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With the continuous scaling of CMOS technology, single-event multi-node upsets (MNU) induced by charge sharing has continued to occur in latches when hit by high-energy particles. This paper presents a quadruple-node upset (QNU) tolerant latch design (referred to as P-DICE latch) to achieve both high reliability and low area overhead. The P-DICE latch takes advantage of the error-blocking properties of Cross-Coupled Element and C Element to tolerate QNU, and achieves 100% self-recovery of SNU and DNU. Compared with previous eight MNU hardened latches, the P-DICE latch has the lowest overhead in terms of area, area-power-delay product (APDP), and area-power-delay soft error rate ratio product (APDSP), and has the highest critical charge. Moreover, the proposed P-DICE latch can tolerate QNU caused by high-energy particles to ensure the reliability of the circuit. Compared with eight MNU hardened latches, the proposed P-DICE latch achieves 24.58% reduction in area, 33.05% reduction in power, 17.19% reduction in delay, 48.29% reduction in area-power-delay product, 61.60% reduction in APDSP, and 142.82% improvement in critical charge on average. [ABSTRACT FROM AUTHOR]

To tolerate Double Nodes Upset (DNU) and Triple Nodes Upset (TNU), we propose the DNU Tolerant Latch (DNUL) and TNU Tolerant Latch (TNUL) with low overhead and high stability. Both DNUL and TNUL are composed of the looped Input-Split C-Elements (ISCs) and the C-Elements (CEs) at the output level. Based on the robust blocking ability of the ISCs, the simultaneous upset of all inputs of the CE can be blocked. DNUL and TNUL have low overhead with fewer transistors by utilizing the clock-gating and high-speed path technique. Exhaustive HSPICE simulation shows that, in contrast to previous DNU tolerant latches, DNUL is optimal in terms of delay, power consumption and product of delay and power (PDP), but is suboptimal in terms of area overhead. Compared with all alternative structures, TNUL is the best in terms of delay and PDP. Compared to other TNU tolerant latches, TNUL achieves a suboptimal power consumption and area overhead. Variation analysis shows that DNUL and TNUL are insensitive to variations of process, voltage and temperature (PVT). [ABSTRACT FROM AUTHOR]

To meet the requirements of both cost-effectiveness and high reliability for low-orbit aerospace applications, this paper first presents a radiation hardened latch design, namely HLCRT. The latch mainly consists of a single-node-upset self-recoverable cell, a 3-input C-element, and an inverter. If any two inputs of the C-element suffer from a double-node-upset (DNU), or if one node inside the cell together with another node outside the cell suffer from a DNU, the latch still has a correct value on its output node, i.e., the latch is effectively DNU hardened. Based on the latch, this paper also presents a flip-flop, namely HLCRT-FF that can tolerate SNUs and DNUs. Simulation results demonstrate the SNU/DNU tolerance capability of the proposed HLCRT latch and HLCRT-FF. Moreover, due to the use of a few transistors, clock gating technologies, and high-speed paths, the proposed HLCRT latch and HLCRT-FF approximately save 61% and 92% of delay, 45% and 55% of power, 28% and 28% of area, and 84% and 97% of delay-power-area product on average, compared to state-of-the-art DNU hardened latch/flip-flop designs, respectively. [ABSTRACT FROM AUTHOR]

Condensing gas boilers are widely employed for their high heat efficiency, which attributes to their ability to use the recoverable sensible heat and latent heat in flue gas. In this paper, the optimal excess air rate of a novel condensing gas boiler is investigated experimentally. With the change of excess air rate, the pre-mixed and post-mixed systems were used to study the performance, the thermal efficiency and emissions of the boiler. The CO emission reduces firstly then increases regardless of which premixed system, when the excess air rate is from 1.15 to 1.4. The NOx emission decrease from 64 ppm to 10 ppm and the efficiency decreases from 64 ppm to 19 ppm as the excess air rate increases from 1.15 to 1.4. The efficiency decreases from 102.05% to 98.7% and the efficiency decreases from 100.9% to 97.6% as the excess air rate increases from 1.15 to 1.35. Considering both NOx emission and thermal efficiency, the optimum excess air rate is 1.23. With the change of heat load, the emission, the fan speed and the thermal efficiency of the two system were compared. The concentration of CO increases from 7.5 ppm to 65.5 ppm when the pre-mixed system heat load changes from 8 kW to 24 kW. The efficiency of post-mixed system decreases from 106.5% to 97.5% and the efficiency of pre-mixed system decreases from 106.9% to 96.8% as the heat load increases from 9 to 26 kW. The variation of thermal efficiency and condensate volume with various heat load in the post-mixed system with different return water temperature are also studied. The efficiency decreases from 107% to 98.5% as the heat load increases from 9 to 24 kW at the inlet of return water is 30 °C. And the vapor condensation ratio ω decreases from 105% to 97.5% as the heat load increases from 9 to 24 kW at the inlet of return water is 40 °C. In summary, post-mixed system is more suitable for the development of small condensing boilers. The lower the return water temperature and heat load, the higher the thermal efficiency of boiler. [ABSTRACT FROM AUTHOR]