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This paper delineates the design and fabrication of Nafion and Chlorophyll-Nafion membranes in originating the flexible supercapacitors and direct alcoholic fuel cells. Herein, the procedure for the extraction of Chlorophyll from the plant leaves is demonstrated. An advanced flexible membrane of Nafion-Chlorophyll is synthesized by a facile synthesis procedure. Here, we examine the Nafion-Chlorophyll membrane as a supercapacitor and its performance is enhanced in the absence of light using three-electrode setup. The chlorophyll intercalated membrane electrodes depict a specific capacitance of 0.237 μ F c m - 2 when the light is just on from the dark and decreased to 0.15 μ F c m - 2 after 60 min of light exposure. Moreover, the membrane electrode also exhibits capacitive retention of 89.04% after 1000 cycles. Furthermore, the excellent efficiency of the Nafion-Chlorophyll membrane is observed in methanol and ethanol oxidation reactions (MOR and EOR) along with the current density of 10 and 9.43 μ A c m - 2 respectively. Thus, the fabricated flexible chlorophyll membrane shows huge proficiency in portable and flexible energy storage platforms. [ABSTRACT FROM AUTHOR]

In this paper, the bimetallic cathode material of cobalt vanadium organic framework (Bimetallic organic framework) is fabricated by facile hydrothermal method and heat treatment. The hollow spheric and porous surface containing tailored morphology of bimetallic MOF composite plays a pivotal role in energy storage application. That is efficaciously inherited from the base cobalt MOF imidazolate template. The electrochemical analysis delineated that the vanadium interpolated ZIF-67 MOF composite unveiled an augmented super capacitive performance. The as-obtained specific capacitance is 549 F/g at a 2 mV/s scan rate, and 349 F/g at 3 mA/cm2 applied current value. Furthermore, exceptional capacity retention of over 89% and 95% coulombic efficiency was obtained for the fabricated cathode material even after 5000 cycles. Combining biowaste-derived activated carbon with a Bimetallic Organic Framework, the asymmetric device of supercapacitor storage is fabricated. That device works on 0–1.4 V windows. The accomplished galvanometric capacitance is 151 F/g in the 4 mA current with the maximum specific energy of 42.6 Wh/kg and the specific power of 1399 W/kg and exhibited promising stability over 10000 cycles. These attained results affirm its proficient application as cathode material of supercapacitor devices. Write up The porous hollow-spheric Bimetallic organic framework and biowaste derive APCs are assembled in an asymmetric solid-state supercapacitor device that delineates the real-time application by analyzing it with an LED glowing circuit about a reasonable time that can replicate the feasibility of a real-time portable energy storage device. [ABSTRACT FROM AUTHOR]

Subsampling fractional PLLs (SSPLL) offer better in-band phase noise performance than other conventional PLLs. However, the issue of spurs is persistent like in every other PLL. The causes of spurs in SSPLLs are phase difference errors between the oscillator phases, shape of the oscillator waveform, fractional frequency divider delay and phase-frequency detector and charge pump nonidealities. In this article, the causes of spurs are modeled and compared with simulated values which match with fair accuracy. Additionally, a SSPLL is designed with a control voltage sampler to reduce spurs due to phase errors that may arise due to process variations and device mismatches. The addition of the sampler helps in reducing the fractional spurs from - 46 / - 53 dBc to - 50 / - 61 dBc in the worst and best circuit conditions. The SSPLLs are analyzed and designed in 180 nm CMOS technology. [ABSTRACT FROM AUTHOR]

Spurs are generated at the output of conventional PLLs due to nonidealities of the phase-frequency detector and charge pump, and variation in the modulus of the frequency divider. The former two induces reference spurs while the latter causes fractional spurs. Here, an attempt is made to accurately model the nonidealities and derive the magnitude of spurs. The models presented are based on time-domain analysis of the PLL control voltage which is approximated into rectangular waves for shorter duration and linear waves for longer duration compared to the reference period. The theoretical derivations for reference spurs show a maximum error of 3 dB from the simulated values, while that of fractional spurs show a maximum error of 8 dB. The simulations were performed in 180 nm CMOS technology. [ABSTRACT FROM AUTHOR]

In this article, a charge pump circuit featuring minimal mismatch between its up and down currents is proposed. In conventional charge pumps, where error amplifiers are used in feedback, the factor that hinders exact current matching is the offset voltage of the error amplifier. In the proposed design, the input offset voltage is computed and additional current delivering/comsuming branch is implemented to supplement for the error current. The new charge pump requires a few error amplifiers and a dynamic comparator for its operation. Simulations considering process variations show current mismatch of less than 20 nA even at the worst case event. The proposed charge pump has been utilized in PLL circuits to reduce reference spurs and simulations of these PLLs show remarkable spur reduction. [ABSTRACT FROM AUTHOR]