1. Optimizing Static Power Dissipation by Functional Units in Superscalar Processors
- Author
-
Rajiv Gupta, Santosh Pande, Soner Önder, and Siddharth Rele
- Subjects
Power gating ,business.industry ,Computer science ,Optimizing compiler ,Parallel computing ,computer.software_genre ,Microarchitecture ,Instruction set ,Idle ,Embedded system ,Basic block ,Dynamic demand ,Compiler ,business ,computer - Abstract
We present a novel approach which combines compiler, instruction set, and microarchitecture support to turn off functional units that are idle for long periods of time for reducing static power dissipation by idle functional units using power gating [2,9]. The compiler identifies program regions in which functional units are expected to be idle and communicates this information to the hardware by issuing directives for turning units off at entry points of idle regions and directives for turning them back on at exits from such regions. The microarchitecture is designed to treat the compiler directives as hints ignoring a pair of off and on directives if they are too close together. The results of experiments show that some of the functional units can be kept off for over 90% of the time at the cost of minimal performance degradation of under 1%.
- Published
- 2002
- Full Text
- View/download PDF