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Using the knowledge that any gate can be built through different arrangements of micro-ring resonators, this paper proposes the all-optical design of XOR and XNOR logic gates. The gates structure thus consists of micro-ring resonators (MRR) paired with a constant source of light (COS). MRRs in these designs are utilized as modulators by tuning their resonant wavelengths. In this way, under no external disturbances, the rings are uncoupled by default. The proposed devices are CMOS-compatible meaning that they can be fabricated using the existing technologies. Also, to reduce the fabrication complexity of the proposed devices, thermo-optic modulation is employed as primary light modulating technique. The logic gates are tested at 25 kpbs. Device parameters are provided as well for manufacturing purposes. The study concludes with suggestions on design improvements and potential application of the optical gates.

In recent years, as demand for high speed communication with advanced technology is increasing in optical communicat ion,so optical logic gates are being widely investigated for various applications in signal processing such as optical binary adder, optical counters, optical time division mult iplexing and low power computing etc. In the proposed work we have demonstrated the implementation of different logic gates such as AND, OR, XOR, XNOR, NAND and NOR which are the basic components to design any combinational and sequential circuits using Mach Zehnder Modulator (MZM). The MZM minimizes the effect of dispersion and provides the fast switching for high speed optical communicat ion. The MZM is used for controlling the amplitude of optical wave by applying voltage that introduced phase shift in the wave passing through the arm. This allows us to switch the output power from high to low or vice - versa (from login 1 to 0 or vice-versa). The proposed optical logic gates using MZM has low complexity and high scalability.

In this paper, we have reported design and analysis of logic NOR and XNOR gates based on two dimensional (2D) photonic crystals at a wavelength of 1550nm. All the logic gates based on the phenomenon of interference and selfcollimation effect. In proposed structure, we control the output by adjusting phase difference to achieve constructive or destructive interference. The working of these logic gates is analyzed by the FDTD method.

In this paper, a 3D 1Gfps BSI image sensor is proposed, where 128 × 256 pixels are located in the top-tier chip and a 32 × 32 localized driver array in the bottom-tier chip. Pixels are designed with Multiple Collection Gates (MCG), which collects photons selectively with different collection gates being active at intervals of 1ns to achieve 1Gfps. For the drivers, a global PLL is designed, which consists of a ring oscillator with 6-stage current starved differential inverters, achieving a wide frequency tuning range from 40MHz to 360MHz (20ps rms jitter). The drivers are the replicas of the ring oscillator that operates within a PLL. Together with level shifters and XNOR gates, continuous 3.3V pulses are generated with desired pulse width, which is 1/12 of the PLL clock period. The driver array is activated by a START signal, which propagates through a highly balanced clock tree, to activate all the pixels at the same time with virtually negligible skew.

In this paper, an effective design of all-optical logic gates like XOR gate and AND gate is presented. The structure of these two logic gates is based on T-shape waveguide with optimized silica dielectric rod. Along with the two input ports which are essential for the required logical operation, an extra reference input port is used. These two logic gates can be used to construct for various combinational logic circuits, data bit comparison circuits, pattern matching, data encoding/decoding and different switching functions etc.

A novel and compact metal-insulator-metal (MIM) waveguide coupled with dual hexagonal ring resonators is proposed and theoretically investigated using the temporal coupled-mode theory and finite-difference time-domain (FDTD) method. The numerical simulation results indicate that when the resonance wavelengths of the two hexagonal ring resonators differ from each other, the plasmon-induced transparency (PIT) phenomenon can be obtained. Furthermore, this plasmonic device is also demonstrated can be used as a logic device which implements the function of fundamental logical operations XOR and XNOR. This device is of significance to optical computing and optical networks-on-chip, and it may help to open up a new field for the application of surface plasmon polaritons (SPPs).

We present a highly miniaturized multimode interference (MMI) coupler based on nonlinear modal propagation analysis (NMPA) method as a novel design method and potential application for optical NAND, NOR and XNOR logic gates for Boolean logic signal processing devices. Crystalline polydiacetylene is used to allow the appearances of nonlinear effects in low input intensities and ultra- short length to control the MMI coupler as an active device to access light switching due to its high nonlinear susceptibility. We consider a 10x33 μm2 MMI structure with three inputs and one output. Notably, the access facets are single-mode waveguides with sub-micron width. The center input contributes to control the induced light propagation in MMI by intensity variation whereas others could be launched by particular intensity when they are ON and 0 in OFF. Output intensity is analyzed in various sets of inputs to show the capability of Boolean logic gates, the contrast between ON and OFF is calculated on mentioned gates to present the efficiency. Good operation in low intensity and highly miniaturized MMI coupler is observed. Furthermore, nonlinear effects could be realized through the modal interferences. The issue of high insertion loss is addressed with a 3×3 upgraded coupler. Furthermore, the main significant aspect of this paper is simulating an MMI coupler that is launched by three nonlinear inputs, simultaneously, whereas last presents have never studied more than one input in nonlinear regimes.

All optical logic gates play a key role in implementing an optically transparent network where the node functionalities are performed in the optical domain to reduce latency and power consumption. In this paper we present the experimental demonstration and details of optimization of all optical XOR/ XNOR gate using four-wave mixing (FWM) in Semiconductor Optical Amplifier (SOA) for 10 Gbps Differential Phase Shift Keyed (DPSK) data. Two DPSK modulated signals at carrier frequencies ω1 and ω2, phases ϕ1and ϕ2and a continuous wave pump at frequency ωCW and phase ϕCW are allowed to undergo FWM in a non-linear SOA to generate additional frequency components. The phase of the generated FWM idler corresponding to the frequency ω1+ ω2-ωCW given by ϕ1+ ϕ2- CW corresponds to the XOR operation in DPSK format. Light from a DFB and tunable laser source (TLS) are combined and phase-modulated using a pseudo-random bit sequence. The bit sequences in the two carrier wavelengths are separated in time by propagating through a sufficient length of SMF; the data is combined with a CW pump from a tunable laser and allowed to undergo non-degenerate FWM in a nonlinear SOA. The relative spacing between the pump and the signal wavelengths and their polarization states are optimized to yield maximum conversion efficiency in the desired idler. The XOR output is further propagated through a delay-line interferometer (DLI) to obtain XOR and XNOR outputs in the two ports of the DLI, in the OOK format. Extinction ratio and Contrast ratio of better than 7.2 dB and 10.6 dB respectively for the XNOR gate and 6.8 dB and 7.5 dB for the XOR gaterespectively.

Coupled-resonator-induced transparency (CRIT) effect has been widely studied in parallelly coupled double microring resonators (MRRs), and various applications based on the CRIT effect have been demonstrated. We report the proposal and demonstration of a directed logic circuit with the functions of XOR and XNOR using CRIT. Two electrical signals applied to two coupled MRRs represent two operands of the logic operations, and the operation results are represented by the output optical signal. As proof-of-concept, the thermo-optic modulation scheme is employed with an operating speed of 10 kbps.

Electro-optic logic is a paradigm which employs the optical switch network to perform the logical operation. The status of each switch in the optical network is determined by an electrical Boolean signal applied to it. The operation of each switch is independent of the operations of other switches in the network and the operation result propagates in the network at the speed of light. The overall latency of the logic circuit is very small and all switches perform their operations almost simultaneously. Therefore, the electro-optic logic has a very high operation speed. Silicon microring resonator is an attractive structure owing to its outstanding performances, such as compact size, ultra-low power consumption and CMOS-compatible process. Therefore, the electro-optic logic based on silicon microring switches is easy to realize large-scale integration and low-cost manufacture in a high-volume CMOS-photonics foundry. We have proposed and demonstrated two electro-optic logic circuits based on silicon microring switches including XOR/XNOR and AND/NAND. We also proposed the architectures to achieve encoder, decoder and half-adder, and demonstrated them with the thermo-optic effect. In this paper, we will review the recent research on electro-optic logic circuits based on silicon microring switches and introduce new development in this topic.

Many researches are conducted to improve Hopfield Neural Network (HNN) performance especially for speed and memory capacity in different approaches. However, there is still a significant scope of developing HNN using Optical Logic Gates. We propose here a new model of HNN based on all-optical XNOR logic gates for real time color image recognition. Firstly, we improved HNN toward optimum learning and converging operations. We considered each unipolar image as a set of small blocks of 3-pixels as vectors for HNN. This enables to save large number of images in the net with best reaching into global minima, and because there are only eight fixed states of weights so that only single iteration performed to construct a vector with stable state at minimum energy. HNN is useless in dealing with data not in bipolar representation. Therefore, HNN failed to work with color images. In RGB bands each represents different values of brightness, for d-bit RGB image it is simply consists of d-layers of unipolar. Each layer is as a single unipolar image for HNN. In addition, the weight matrices with stability of unity at the diagonal perform clear converging in comparison with no self-connecting architecture. Synchronously, each matrix-matrix multiplication operation would run optically in the second part, since we propose an array of all-optical XOR gates, which uses Mach-Zehnder Interferometer (MZI) for neurons setup and a controlling system to distribute timely signals with inverting to achieve XNOR function. The primary operation and simulation of the proposal HNN is demonstrated.

This paper presents adder circuits of various architectures aimed at reducing static power dissipation. Circuittopologies for basic building blocks were evaluated for fabrication technologies of 65nm down to 32nm, andsimulation results are presented. This work has lead to the development of various low power adder circuits andprovides comparative analysis leading to the recommendation that a variable size block carry select adder is thebest performer, taking into consideration both static and dynamic power dissipation.Keywords: Ultra deep submicron, static power dissipation, arithmetic circuits, CMOS 1. INTRODUCTION The demand for smaller and faster portable equipment has pushed the circuit technology to a dramatic reductionin feature sizes entering the nanometer domain. This resulted in devices that are scaled down in threshold voltageand gate oxide thickness. The consequence is a signi“cant increase in Static Power Dissipation (SPD). SPD inmodern CMOS fabrication technologies is a major component of the total power dissipation, which impedes highlevel of integration and impacts battery life in portable equipment.Addition is one of the most common arithmetic operations in a wide variety of applications. Adder circuitsare composed of basic building blocks such as muxes, xor and xnor gates, and of particular interest, full addercells. As technology evolved, numerous topologies for these building blocks have been presented, with the intentof increasing the performance of the circuits, reducing the dynamic power dissipation and reducing the areaoccupied by the transistors. However, with the reduction of feature size in new technologies comes what isknown as higher order eects. Such eects which used to be ignored in the design of circuits are becoming moresigni“cant in dictating performance and SPD.As the name implies, SPD occurs regardless of the switching activity of the transistor. Therefore, it is notin”uenced by the capacitive load driven by the transistor, nor by the short-circuit current that ”ows during inputtransitions. While there are many dierent leakage mechanisms in modern submicron devices, they primarilyresult in either current ”ow through the gate or through the drain-source terminals. Leakage modes have beenwell identi“ed and characterized in the literature.

In this work the description of a digital logic XNOR multi-gate device is made. This device is based in the holographic technology in which the inputs binary states are the polarization of the light field in the wavefront. The binary states are controlled by two liquid crystal displays which modulate the polarization of the wavefronts of the inputs, then the logic operation XNOR is made physically in a photorefractive crystal.

Semiconductor optical amplifier (SOA)-based all-optical XNOR and AND gates using four-wave mixing (FWM) and cross-gain modulation (XGM) with improved dynamics are simultaneously realized. The effects of the input optical wave powers and injection current on the critical factors of the logic gate performances, such as the ON-OFF contrast ratio, the output power level of the logic "1", and the output power difference of the logic "1", are theoretically investigated in detail. In addition, the effect of the counter-propagating CW pump on the gain recovery is analyzed.

80Gb/s All-optical Boolean function XNOR has been demonstrated using a dual four wave mixing scheme in two identical highly nonlinear fibers. A numerical model based on nonlinear Schrodinger equation (NLS) in fiber has been employed to simulate the wave mixing process. The NLS equations have been solved using the split-step Fourier method. From the numerical model, system transmission rate is predicted to be as high as 250Gb/s.

Nonlocal spatial solitons are the optical spatial solitons in nonlocal nonlinear media. In this invited paper, a review is given about the progress on this subject. The nonlocal spatial solitons are phenomenologically modeled by the nonlocal nonlinear Schrodinger equation, which can be simplified to a linear model for a strong nonlocality. An exact analytical Gaussian-shaped solution to the linear model is obtained, and a spatial soliton called an accessible soliton is found to exist. A phase shift of such an accessible soliton can be very large comparable to its local counterpart, and this finding might be applied in integrated all-optical devices. More intriguing is the collision between two nonlocal spatial solitons. The interaction of two coherent accessible solitons is always attractive, independent of their relative phase, unlike in a local nonlinearity. Such an interaction behavior is experimentally observed in nematic liquid crystals, and a power-dependent X junction, AND, NOR, and XNOR gates are also experimentally demonstrated. This collisional characteristics has implications to all-optical switching and all-optical logic.

A beam-scanning binary logic (BSBL) and its implementation using a beam-scanning laser diode (BSLD) are proposed. The BSBL is categorized as spatial coding information processing, which operates with spatially coded light signals. A basic BSBL unit consists of two photodetectors, two amplifiers, a light source, and a beam scanner. A unit with three output photodetectors can execute eight types of binary two-inputs/one-output optical logic operations with small modifications: FALSE, AND, XOR, OR, NOR, XNOR, NAND, and TRUE.© (1992) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Ferroelectric liquid crystal (FLC) compounds are investigated for use in optical parallel processing. Spatial light modulators using the smectic C phase FLC's show better contrast ratio, faster switching speeds, and lower cost than twisted nematic liquid crystal spatial light modulators. In this paper we present measurements of characteristic parameters of FLC's, and demonstrate a new optical logic gate capable of performing fourteen Boolean logic operations using single cell FLC devices with photographic masks as inputs. The XOR and XNOR Boolean functions can be achieved by cascading together several optical logic gates. Recent results using 32 x 32 FLC matrix arrays demonstrate an OR gate which has programmable inputs.

Many optical computing schemes employ either intensity-based logic or polarization-based logic. Intensity-based logic utilizes the absence or presence of light to represent the binary logic states 1 and 0, thus dissipating light after each operation. Polarization-based logic uses orthogonal states of polarization to represent its two binary states. This has the advantage that no light is lost in performing cascaded logic operations. Surface stabilized ferroelectric liquid crystal (SSFLC) devices, which can function as half-wave plates, can be used to implement polarization-based parallel optical logic gates. Under the influence of an applied electric field, a properly oriented SSFLC device rotates the polarization of incident light through 90°. By using SSFLC matrix arrays, the light passing through selected pixels can be rotated independently of adjacent pixels. Operating characteristics of a 4 X 4 SSFLC matrix array including contrast ratio, switching speed, switching voltage, and rotary transmission are presented. A matrix addressing scheme is discussed and implemented with a SSFLC. Using two SSFLC matrix arrays, we demonstrate the XOR/XNOR logic operations along with measurements of the percentage of polarized light rotated into the output binary states.