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Aiming at the problems that the image processing system in the field of machine vision has high real-time requirement, and the traditional FPGA design needs long development cycle, but high level synthesis (11LS) provides a new way to accelerate the machine vision algorithm. Based on ZC706 development platform and SDSoC development environment ofXilinx, this paper uses some optimization methods such as pipeline, loop unrolling, parallelism, line buffer and window buffer co-processing to realize hardware acceleration of the Sobel edge detection and Harris corner detection algorithm, which are widely used in the machine vision field. The experimental results show that the speed-up ratios of FPGA implementation based on 1ILS method for Sobel and Harris can reach 7. 37 and 19.41 , respectively, compared with software implementation in ARM platform. It can meet the requirements of real-time performance in the filed of machine vision. [ABSTRACT FROM AUTHOR]

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