1. A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems
- Author
-
Hussein, Fakhoury, Chadi, Jabbour, and Van-Tam, Nguyen
- Subjects
analog to digital conversion ,Delta Sigma modulators ,CMOS design ,decimation filter ,Electrical and Electronic Engineering ,Biochemistry ,Instrumentation ,Atomic and Molecular Physics, and Optics ,Analytical Chemistry - Abstract
This paper describes a Delta Sigma ADC IC that embeds a 5th-order Continuous-Time Delta Sigma modulator with 40 MHz signal bandwidth, a low ripple 20 to 80 MS/s variable-rate digital decimation filter, a bandgap voltage reference, and high-speed CML buffers on a single die. The ADC also integrates on-chip calibrations for RC time-constant variation and quantizer offset. The chip was fabricated in a 1P7M 65 nm CMOS process. Clocked at 640 MHz, the Continuous-Time Delta Sigma modulator achieves 11-bit ENOB and 76.5 dBc THD up to 40 MHz of signal bandwidth while consuming 82.3 mW.
- Published
- 2022
- Full Text
- View/download PDF