Search

This study aimed to propose a silicon-on-insulator (SOI)-based charge-trapping synaptic transistor with engineered tunnel barriers using high-k dielectrics for artificial synapse electronics capable of operating at high temperatures. The transistor employed sequential electron trapping and de-trapping in the charge storage medium, facilitating gradual modulation of the silicon channel conductance. The engineered tunnel barrier structure (SiO2/Si3N4/SiO2), coupled with the high-k charge-trapping layer of HfO2 and high-k blocking layer of Al2O3, enabled reliable long-term potentiation/depression behaviors within a short gate stimulus time (100 μs), even under elevated temperatures (75 and 125 °C). Conductance variability was determined by the number of gate stimuli reflected in the maximum excitatory postsynaptic current (EPSC) and the residual EPSC ratio. Moreover, we analyzed the Arrhenius relationship between the EPSC as a function of the gate pulse number (N = 1–100) and the measured temperatures (25, 75, and 125 °C), allowing us to deduce the charge trap activation energy. A learning simulation was performed to assess the pattern recognition capabilities of the neuromorphic computing system using the modified National Institute of Standards and Technology datasheets. This study demonstrates high-reliability silicon channel conductance modulation and proposes in-memory computing capabilities for artificial neural networks using SOI-based charge-trapping synaptic transistors.

The aim of this study is to investigate the effects of the separator thickness on not only the heat and mass transfer characteristics, but also the power generation characteristics of a polymer electrolyte membrane fuel cell (PEMFC) with a thin polymer electrolyte membrane (PEM) and thin gas diffusion layer (GDL) operated at higher temperatures of 363 and 373 K. The in-plane temperature distributions on the back of the separator at the anode and cathode, which are the opposite sides to the GDL, are measured using a thermograph at various initial cell temperatures (Tinit), relative humidity (RH) levels, and supply gas flow rates. The total voltage corresponding to the load current is measured in order to evaluate the performance of the PEMFC. As a result, it is revealed that the effect of the RH on the power generation characteristics is more significant when the separator thickness decreases. It is revealed that the power generation performance obtained at high current densities decreases with the increase in Tinit with thinner separator thicknesses. According to the investigation of the in-plane temperature distribution, it is clarified that the temperature decreases at corner positions in the separator with the separator thickness of 2.0 mm, while the temperature gradually increases along with the gas flow with separator thicknesses of 1.5 mm and 1.0 mm.

Temperature-dependent threshold voltage (Vth) stability is a significant issue in the practical application of semi-conductor power devices, especially when they are undergoing a repeated high-temperature operation condition. The Vth analytical model and its stability are dependent on high-temperature operations in wide-bandgap gallium nitride (GaN)-based high electron mobility transistor (HEMT) devices that were investigated in this work. The temperature effects on the physical parameters—such as barrier height, conduction band, and polarization charge—were analysed to understand the mechanism of Vth stability. The Vth analytical model under high-temperature operation was then proposed and developed to study the measurement temperatures and repeated rounds dependent on Vth stability. The validity of the model was verified by comparing the theoretical calculation data with the experimental measurement and technology computer-aided design (TCAD) simulation results. This work provides an effective theoretical reference on the Vth stability of power devices in practical, high-temperature applications.

These days, the demand on electronic systems operating at high temperature is increasing owing to bursting interest in applications adaptable to harsh environments on earth, as well as in the unpaved spaces in the universe. However, research on memory technologies suitable to high-temperature conditions have been seldom reported yet. In this work, a novel one-transistor dynamic random-access memory (1T DRAM) featuring the device channel with partially inserted wide-bandgap semiconductor material toward the high-temperature application is proposed and designed, and its device performances are investigated with an emphasis at 500 K. The possibilities of the program operation by impact ionization and the erase operation via drift conduction by a properly high drain voltage have been verified through a series of technology computer-aided design (TCAD) device simulations at 500 K. Analyses of the energy-band structures in the hold state reveals that the electrons stored in the channel can be effectively confined and retained by the surrounding thin wide-bandgap semiconductor barriers. Additionally, for more realistic and practical claims, transient characteristics of the proposed volatile memory device have been closely investigated quantifying the programming window and retention time. Although there is an inevitable degradation in state-1/state-0 current ratio compared with the case of room-temperature operation, the high-temperature operation capabilities of the proposed memory device at 500 K have been confirmed to fall into the regime permissible for practical use.