1. Low-parasitic ESD protection strategy for RF ICs in 0.35μm CMOS process
- Author
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Chen Zhongjian, Jia Song, Ji Lijiu, and Wang Yuan
- Subjects
Electrostatic discharge ,Parasitic capacitance ,Robustness (computer science) ,Computer science ,Electronic engineering ,General Physics and Astronomy ,Parasitic extraction ,Radio frequency ,Cmos process ,Electronic circuit ,Human-body model - Abstract
A systemic and comprehensive ESD-induced parasitic model is presented in this paper, which is used to analyse the parasitic influences of electrostatic discharge (ESD) protection circuits on the performance of radio frequency applications. A novel low-parasitic ESD protection structure is made in a 0.35μm 1P3M silicide CMOS process. The measured results show that this novel structure has a low parasitic capacitance about 310fF and a low leakage current about 12.2nA with a suitable ESD robustness target about 5kV human body model.
- Published
- 2006
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