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A full W-band low noise amplifier (LNA) module is designed and fabricated. A broadband transition is introduced in this module. The proposed transition is designed,optimized based on the results from numerical simulations. The results show that 1 dB bandwidth of the transition ranges from 61 to 117 GHz. For the purpose of verification,two transitions in back-to-back connection are measured. The results show that transmission loss is only about 0.9-1.7 dB. This transition is used to interface integrated circuits to waveguide components. The characteristic of the LNA module is measured after assembly. It exhibits a broad bandwidth of 75 to 110 GHz,and has a small signal gain above 21 dB. The noise figure is lower than 5.2 dB throughout the entire W-band (below 3 dB from 89 to 95 GHz) at room temperature. The proposed LNA module exhibits potential for millimeter wave applications due to its high small signal gain,low noise,and low DC power consumption.

On-wafer S-parameter de-embedding techniques from 0.1 to 110 GHz are researched. The solving results of thru-reflect-line (TRL) and line-reflect-match (LRM) de-embedding algorithms, when the input and output ports are asymmetric, are given. The de-embedding standards of TRL and LRM are designed on an InP substrate. The validity of the de-embedding results is demonstrated through two passive components, and the accuracy of TRL and LRM de-embedding techniques is compared from 0.1 to 110 GHz. By utilizing an LRM technique in 0.1–40 GHz and a TRL technique in 75–110 GHz, the intrinsic S-parameters of active device HBT in two frequency bands are obtained, and comparisons of the extracted small-signal current gain and the unilateral power gain before and after de-embedding are presented. The whole S-parameters of actual DUT from 0.1 to 110 GHz can be obtained by interpolation.

A W-band frequency doubler MMIC is designed and fabricated using 1-μm InP DHBT technology. Active balun is employed to transform the single-ended signal into differential output. Push—push configuration loaded with harmonic resonant network is utilized to acquire the second harmonic frequency. A multi-stage differential structure improves the conversion gain and suppresses the fundamental frequency. The MMIC occupies an area of 0.55 × 0.5 mm2 with 18 DHBTs integrated. Measurements show that the output power is above 5.8 dBm with the suppression of fundamental frequency below −16 dBc and the conversion gain above 4.7 dB over 75–80 GHz.

A two-stage MMIC power amplifier has been realized by use of a 1-μm InP double heterojunction bipolar transistor (DHBT). The cascode structure, low-loss matching networks, and low-parasite cell units enhance the power gain. The optimum load impedance is determined from load-pull simulation. A coplanar waveguide transmission line is adopted for its ease of fabrication. The chip size is 1.5 × 1.7 mm2 with the emitter area of 16 × 1 μm × 15 μm in the output stage. Measurements show that small signal gain is more than 20 dB over 75.5–84.5 GHz and the saturated power is 16.9 dBm @ 79 GHz with gain of 15.2 dB. The high power gain makes it very suitable for medium power amplification.