1. Highly manufacturable silicon vertical diode switches for new memories using selective epitaxial growth with batch-type equipment
- Author
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Byoungdeog Choi, Han-jin Lim, Jinman Han, Chilhee Chung, Hyung Ho Park, Hoyoung Kang, Kwhanmien Kim, Sangwook Nam, Keun-Ho Lee, Byung-ki Kim, Hanwook Jeong, and Hwan-Hee Jeong
- Subjects
Materials science ,Silicon ,business.industry ,Annealing (metallurgy) ,Batch reactor ,Dichlorosilane ,chemistry.chemical_element ,Chemical vapor deposition ,Condensed Matter Physics ,Epitaxy ,Electronic, Optical and Magnetic Materials ,chemistry.chemical_compound ,chemistry ,Materials Chemistry ,Optoelectronics ,Wafer ,Electrical and Electronic Engineering ,business ,Diode - Abstract
Practical selectivity window of selective epitaxial growth (SEG) using a H2/SiH4/Cl2 cyclic chemical vapor deposition (CVD) system has been investigated with the batch-type vertical furnace equipment, replacing a conventional single-wafer H2/dichlorosilane/HCl CVD system. The process temperature was less than 700 °C, which is suitable for a low thermal budget process applicable to next-generation memories including vertical pn-diode switches. Selectivity loss is quantified by an in-line inspection tool to determine the practical number of selectivity losses. The H2/SiH4/Cl2 cyclic CVD system provides an excellent capacity of 40 wafers per batch. Selectivity loss, which is one of the most crucial features in the SEG process for the diode application, is controlled with both the amount of SiH4 and Cl2 and the period of gas supply, and the practical number of selectivity loss is confirmed to be less than 100 in 200 mm wafers. Without high temperature annealing in hydrogen ambient, low temperature cyclic SEG in the batch reactor ensures the clean interface and improved crystalline quality of SEG-Si, as well as high throughput.
- Published
- 2011
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