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In-memory computing based on memristive logic is considered as a prospective non von Neumann computing paradigm. In this letter, we systematically analyze the four-variable logic method and map it into the operation of two anti-serial complementary memristors in the crossbar array architecture. Arbitrary Boolean logic can be implemented within three cycles with the experimental evidence of reconfigurable NAND, NOR, and XOR logic using Pt/HfO2/TiN devices. Taking advantage of the functional flexibility, a parallel 1-bit full adder that can be realized in 8 cycles within a $\textsf {4}\times \textsf {3}$ array has been designed and verified in simulation.

Traffic signal control is widely used at intersection to improve its operation efficiency. However, the existing signal control systems cannot satisfy the control requirements under unsaturated, saturated, and oversaturated conditions, which will induce queue spillover, even network deadlock. A signal Cooperative Control method with traffic Supply and Demand (CCSD) on a single intersection is put forward to maximize the efficiency and avoid queue spillover by the cooperation between traffic supply and demand. A general CCSD control framework is constructed by the control relationship description and discrete-time state-space equations. Furthermore, the uniform matrix description of CCSD is put forward under the framework to fast solve the problem by matrix calculation. An artificial intelligence planning model on CCSD is established by an objective function compromising between throughput and fairness to satisfy the control requirements under dynamic unknown traffic environment. CCSD is compared with the Webster method and capacity-aware back-pressure (CABP) control in the experiments by both the simulation data and investigation data under unsaturated, saturated, and oversaturated conditions. The results show that CCSD is superior to CABP control and the Webster method in the throughput, the number of stops, and stop time, and can avoid the queue spillover. Accordingly, CCSD can be used to improve the efficiency and avoid queue spillover at intersection under all traffic conditions.

Nonvolatile stateful logic through RRAM is a promising route to build in-memory computing architecture. In this letter, a logic methodology based on 1T1R structure has been proposed to implement functionally complete Boolean logics. Arbitrary logic functions could be realized in two steps: initialization and writing. An additional read step is required to read out the logic result, which is in situ stored in the nonvolatile resistive state of the memory. Cascade problem in building larger logic circuits is also discussed. Our 1T1R logic device and operation method could be beneficial for massive integration and practical application of RRAM-based logic.