1. Robust Duplication With Comparison Methods in Microcontrollers
- Author
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Tom Fairbanks, Zachary K. Baker, Justin L. Tripp, George Duran, and Heather Quinn
- Subjects
Nuclear and High Energy Physics ,010308 nuclear & particles physics ,business.industry ,Computer science ,Electrical engineering ,02 engineering and technology ,01 natural sciences ,020202 computer hardware & architecture ,law.invention ,Microcontroller ,Microprocessor ,Software ,Nuclear Energy and Engineering ,Robustness (computer science) ,law ,Software fault tolerance ,Embedded system ,0103 physical sciences ,0202 electrical engineering, electronic engineering, information engineering ,Redundancy (engineering) ,Avionics software ,Software reliability testing ,Electrical and Electronic Engineering ,business - Abstract
Commercial microprocessors could be useful computational platforms in space systems, as long as the risk is bound. Many spacecraft are computationally constrained because all of the computation is done on a single radiation-hardened microprocessor. It is possible that a commercial microprocessor could be used for configuration, monitoring and background tasks that are not mission critical. Most commercial microprocessors are affected by radiation, including single-event effects (SEEs) that could be destructive to the component or corrupt the data. Part screening can help designers avoid components with destructive failure modes, and mitigation can suppress data corruption. We have been experimenting with a method for masking radiation-induced faults through the software executing on the microprocessor. While triple-modular redundancy (TMR) techniques are very effective at masking faults in software, the increased amount of execution time to complete the computation is not desirable. In this paper we present a technique for combining duplication with compare (DWC) with TMR that decreases observable errors by as much as 145 times with only a 2.35 time decrease in performance.
- Published
- 2017