5 results on '"Lingzhong Zhao"'
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2. Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes for Constructing 3-D VLSI Subarrays
- Author
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Zhongyi Zhai, Lingzhong Zhao, Hao Ding, Hanpeng Xiao, Junyan Qian, and Zhide Zhou
- Subjects
Very-large-scale integration ,Scheme (programming language) ,Computer science ,Reliability (computer networking) ,Process (computing) ,Fault tolerance ,02 engineering and technology ,Construct (python library) ,Parallel computing ,Fault (power engineering) ,Computer Graphics and Computer-Aided Design ,020202 computer hardware & architecture ,0202 electrical engineering, electronic engineering, information engineering ,Electrical and Electronic Engineering ,Host (network) ,computer ,Software ,computer.programming_language - Abstract
In this paper, we investigated the technique for improving the reliability of 3-D processor with faults by reconfiguring a 3-D fault-free subarray utilizing as many nonfaulty process elements (PEs) as possible. A novel flexible rerouting scheme is proposed, which makes the PEs can be rerouted or bypassed in three dimensions, hence increasing the number of neighbors of each element to construct a logical array. Under this scheme, an efficient heuristic algorithm is presented to construct a logical array. The experimental results show that the proposed algorithm under flexible rerouting scheme can produce logical arrays with higher harvest from the host arrays with faults for the random fault scenarios, the improvement is by up to 46.47% compared to the state-of-the-arts.
- Published
- 2020
- Full Text
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3. A Mathematical Model for Reconfiguring VLSI Subarrays Under Row and Column Rerouting
- Author
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Junyan Qian, Yiping Wang, Liang Chang, Lingzhong Zhao, and Zhide Zhou
- Subjects
Very-large-scale integration ,020203 distributed computing ,algorithm ,reconfiguration ,General Computer Science ,Linear programming ,Computer science ,General Engineering ,Control reconfiguration ,Integer programming ,Fault tolerance ,02 engineering and technology ,Parallel computing ,Column (database) ,020202 computer hardware & architecture ,Parallel processing (DSP implementation) ,0202 electrical engineering, electronic engineering, information engineering ,processor array ,General Materials Science ,fault tolerance ,lcsh:Electrical engineering. Electronics. Nuclear engineering ,lcsh:TK1-9971 - Abstract
Increasing the size of target arrays is beneficial to reuse fault-free processing elements (PEs) for reconfiguring 2-D mesh-connected processor arrays with faults. In this paper, we discuss the reconfiguration problem under the row and column rerouting constraint. We present a novel approach, making use of the idea of integer programming, for constructing larger size target arrays. Meanwhile, we propose a new method to deal with the fault-free processing elements in the physical row that is selected for exclusion. Compared with the state-of-arts algorithms, our method can make the fault-free PEs used as much as possible, which means the size of the target array can be significantly improved. Experimental results show that, compared with previous studies, the proposed algorithm achieves better results in terms of the usage rate of fault-free PEs in the host array.
- Published
- 2017
- Full Text
- View/download PDF
4. Optimal Reconfiguration of High-Performance VLSI Subarrays with Network Flow
- Author
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Liang Chang, Zhide Zhou, Tianlong Gu, Junyan Qian, and Lingzhong Zhao
- Subjects
Very-large-scale integration ,020203 distributed computing ,Computer science ,Control reconfiguration ,Fault tolerance ,02 engineering and technology ,Parallel computing ,Flow network ,Processor array ,Capacitance ,020202 computer hardware & architecture ,Computational Theory and Mathematics ,Parallel processing (DSP implementation) ,Hardware and Architecture ,Signal Processing ,0202 electrical engineering, electronic engineering, information engineering ,Time complexity ,Host (network) - Abstract
A two-dimensional mesh-connected processor array is an extensively investigated architecture used in parallel processing. Massive studies have addressed the use of reconfiguration algorithms for the processor arrays with faults. However, the subarray generated by previous algorithms contains a large number of long interconnects, which in turn leads to more communication costs, capacitance and dynamic power dissipation. In this paper, we propose novel techniques, making use of the idea of network flow, to construct the high-performance subarray, which has the minimum number of long interconnects. First, we construct a network flow model according to the host array under a specific constraint. Second, we show that the reconfiguration problem of high-performance subarray can be optimally solved in polynomial time by using efficient minimum-cost flow algorithms. Finally, we prove that the geometric properties of the resulted subarray meet the system requirements. Simulations based on several random and clustered fault scenarios clearly reveal the advantage of the proposed technique for reducing the number of long interconnects. It is shown that, for a host array of size $512 \times 512$ , the number of long interconnects in the subarray can be reduced by up to 70.05 percent for clustered faults and by up to 55.28 percent for random faults with density of 1 percent as compared to the-state-of-the-art.
- Published
- 2016
- Full Text
- View/download PDF
5. A Data-Driven Service Creation Approach for End-Users
- Author
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Bo Cheng, Junliang Chen, Lingzhong Zhao, Yue Tian, Zhongyi Zhai, and Meng Niu
- Subjects
General Computer Science ,Computer science ,end-user development ,Services computing ,02 engineering and technology ,computer.software_genre ,World Wide Web ,020204 information systems ,service composition ,0202 electrical engineering, electronic engineering, information engineering ,General Materials Science ,Mashup ,Web Coverage Service ,Service (business) ,business.industry ,Service design ,General Engineering ,mashup ,020206 networking & telecommunications ,Service provider ,Lightweight service creation ,lcsh:Electrical engineering. Electronics. Nuclear engineering ,Data as a service ,Web service ,Software engineering ,business ,dataflow ,lcsh:TK1-9971 ,computer - Abstract
Spurred by Web technologies and service computing paradigm, more and more Web services have been delivered via standardized interfaces on the Internet. Mashup is exactly an enabling technology for end-users to combine these services into applications. However, there are some issues of end-user service development with mashup techniques. It not only requires users that develop application logics equipped with more or less programming skills, but also lacks a lightweight mashup model and systematic development approach in the existing mashup tools. To address these issues, we propose a data-driven service creation approach to facilitate application development and deployment. In the approach, we propose the service data model (SDM) for adaptation of heterogeneous Web services, the service relation model (SRM) for representation and refinement of data interaction between services, and the service process graph (SPG) for describing business logics of mashup applications. We develop an IFrame implementation for SDM that can facilitate service providers to wrap heterogeneous Web services in a unified way and display a visual element for the service. Meanwhile, we implement a pipeline as an intuitive form of SRM that can be used by end-users to develop business logic more effectively. To adapt the dynamic application scenarios, we also construct an event-driven execution mechanism for SPG. A lightweight service creation environment is then implemented to support end-users to develop applications in a simulative way, and a corresponding development methodology is introduced for this tool. Finally, the end-user evaluation and performance evaluation are conducted to evaluate our platform.
- Published
- 2016
- Full Text
- View/download PDF
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