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This brief presents an all-digital frequency synthesizer based on the flying adder (FA) architecture. The FA is a fascinating architecture for frequency synthesizer designs due to its simplicity and effectiveness. The FA-based frequency synthesizer can simply use a set of multiple phase reference signals to generate a desired frequency to achieve fast frequency switching. In the proposed work, the frequency synthesizer adopts an all-digital phase-locked loop to provide a steady reference signal for the FA. The proposed frequency synthesizer is implemented in a standard 0.18-μm CMOS cell-based technology, and the core area is 0.16 mm2. The output frequency range is 39.38-226 MHz, and the peak-to-peak jitter is less than 130 ps.

This paper presents an in-car networking transceiver front end that is compliant with FlexRay automotive electronic standards. A low-voltage differential-signaling-like transmitter is proposed to drive the twisted pair of the bus. Furthermore, a three-comparator scheme is used to carry out bit slicing and state recognition at the receiver end. In order to resist process and temperature variation, a 20-MHz clock generator with process, supply voltage, and temperature compensation is proposed in this paper. A prototype system as well as a chip implemented by using a typical 0.18 ?m single-poly six-metal CMOS process is reported in this paper. The proposed prototypical transceiver front end has been tested by the thermo chamber and a FlexRay development board to certify its operation in the [-40°C-+125°C] temperature range and FlexRay standards. The power consumption of the whole chip is 43.01 mW at a 10 Mbit/s throughput. The core area of this design is 0.117 mm2. The maximal throughput of the proposed prototypical transceiver front end can reach 40 Mbit/s.