Search

In this paper, the design of a 77.3 GHz Standing-Wave oscillator (SWO) is presented. The proposed SWO relies on the distribution of varactors along an asymmetrical slow-wave coplanar stripline, which enables the improvement of the quality factor of the tunable resonator, resulting in superior performance in terms of phase noise and DC-to-RF efficiency. The design methodology, based on the use of analytical models and abaci, is presented in detail and applied to a design in a 55-nm CMOS technology. With a core consumption of 15.1 mW, the proposed SWO operates from 76.09 GHz to 78.60 GHz and presents a phase noise of −115.1 dBc/Hz at 10 MHz offset, leading to a Figure of Merit (FOM) of −181 dBc/Hz. The DC-to-RF efficiency obtained is 3.1%.

This paper presents an innovative Through-Load element aimed at characterization applications at mm-wave frequencies. The proposed structure can behave as a Through connection or as a 50- $\Omega $ load depending on a DC control voltage. Among other potential applications, this system can be used to implement a transfer switch or an attenuator. A demonstrator was fabricated and measured in the STM 55-nm BiCMOS technology. Over a wide bandwidth, from 55 GHz up to 170 GHz, experimental measurements demonstrate a maximum 1.6-dB of insertion loss when behaving as a Through connection and a minimum 14-dB of insertion loss when behaving as a 50- $\Omega $ load. In both cases, the return loss is better than 10 dB. The insertion loss at 90 GHz is 0.6 dB for the Through connection and 20 dB for the 50- $\Omega $ load connection.

The design of a compact substrate integrated waveguide (SIW) cavity-backed circular-polarized antenna using a slow wave structure is proposed in PCB technology. Based on a multilayer substrate, this topology includes internal metallized blind via holes connected to the bottom conductive plane, inducing the physical separation of electric and magnetic fields in the SIW cavity. Hence, a slow wave effect is obtained, allowing a 47% reduction of the antenna cavity in comparison with its classic SIW antenna counterpart. Moreover, by asymmetrically inserting an inductive via into the patch region, a degenerated mode allows both a circular polarization and an enlargement of impedance bandwidth. Measurements and simulations are in good agreement in terms of radiation pattern and circular polarization with a return loss of 15 dB and a gain of 4.8 dBic.

This article introduces a description of the slow wave effect based on the analysis of spatial field separation. Considering an ideal parallel-plate framework, approximate analytical expressions are derived for the slow wave factor (SWF), as well as dielectric attenuation. In particular, it is shown that the SWF can be related to the spatial distribution of both electric and magnetic fields. It is also demonstrated that the dielectric attenuation increases by the same factor as the velocity reduces. The derived principles are applied to a study case consisting of a parallel-plate waveguide partially filled with vertically grown metallic nanowires.

This paper gives a complete theoretical study in a narrow band for the parallel-coupled filters based on short-circuited stub-loaded resonators. It describes a synthesis method for this filter topology, and a complete resonant mode analysis to fully control the spurious frequencies positions. To enlarge the out-of-band rejection, an original technique, based on simple design steps, is used to address tuning of extra transmission zeros. Harmonic was suppressed to better than 35 dB with a wide stopband of more than six time the fundamental frequency. Design equations and design rules are given. Finally, several three-pole bandpass filters are designed and characterized in stripline and miscrostrip technologies to demonstrate the efficiency of the proposed concepts.

This paper describes a new concept of substrate integrated waveguide (SIW): a slow-wave substrate integrated waveguide (SW-SIW). Compared to a conventional SIW, the proposed topology requires a double-layer substrate with a bottom layer including internal metallized via-holes connected to the bottom conductive plane. The slow-wave effect is obtained by the physical separation of electric and magnetic fields in the structure. Electromagnetic simulations show that this topology of SIW allows decreasing the longitudinal dimension by more than 40% since the phase velocity is significantly smaller than that of a classical SIW. Simultaneously, the lateral dimension of the waveguide is also reduced. By considering a double-layer technology, SW-SIWs exhibiting a cutoff frequency of 9.3 GHz were designed, fabricated, and measured. The transversal dimension and the phase velocity of the proposed SW-SIW are both reduced by 40% as compared to a classical SIW designed for the same cutoff frequency, leading to a significant surface reduction. Moreover, an original kind of taper is proposed to achieve a good return loss when the SW-SIW is fed by a microstrip transmission line.

Based on a CMOS slow-wave coplanar-waveguide transmission-line topology, a novel compact millimeter-wave phase shifter is presented. The tunability is accomplished by using a liquid crystal (LC) material as a tunable dielectric between the coplanar signal strip and the shielding plane of the slow-wave transmission line. The device tunability is considerably enhanced by moving the free-standing signal strip with the application of a bias voltage. Combining the miniaturizing benefits of the slow-wave effect with the continuous tuning of LC material, the proposed device occupies only 0.38 mm2 and exhibits high performance. The phase shifter was characterized up to 45 GHz for a maximum bias voltage of 20 V without significant power consumption. The reproducible measurements show a figure-of-merit (ratio between the maximum phase shift and the maximum insertion loss) of 51°/dB at 45 GHz.

This paper presents optimized very high performance CMOS slow-wave shielded CPW transmission lines (S-CPW TLines). They are used to realize a 60-GHz bandpass filter, with T-junctions and open stubs. Owing to a strong slow-wave effect, the longitudinal length of the S-CPW is reduced by a factor up to 2.6 compared to a classical microstrip topology in the same technology. Moreover, the quality factor of the realized S-CPWs reaches 43 at 60 GHz, which is about two times higher than the microstrip one and corresponds to the state of the art concerning S-CPW TLines with moderate width. For a proof of concept of complex passive device realization, two millimeter-wave filters working at 60 GHz based on dual-behavior-resonator filters have been designed with these S-CPWs and measured up to 110 GHz. The measured insertion loss for the first-order (respectively, second-order) filter is -2.6 dB (respectively, -4.1 dB). The comparison with a classical microstrip topology and the state-of-the-art CMOS filter results highlights the very good performance of the realized filters in terms of unloaded quality factor. It also shows the potential of S-CPW TLines for the design of high-performance complex CMOS passive devices.

A compact topology for bandpass filters based on coupled slow-wave resonators is demonstrated. A study of fixed bandpass filters leads to design rules and equations. Measurements on a 0.7-GHz fixed bandpass filter, consisting of three coupled slow-wave resonators, demonstrate the validity of the proposed topology and validate the theory, since the agreement between simulations and measurements is very good. Designed for a Q-factor of 5, this filter shows a Q of approximately 5.2. At the center frequency, insertion loss is 0.6 dB and return loss is greater than 20 dB. A 0.7-GHz tune-all bandpass filter is also designed and tested. The performance of this electronically tuned filter, which incorporates semiconductor varactors, is promising in terms of wide continuous center-frequency and bandwidth tunings. For a center-frequency tuning of plusmn18% around 0.7 GHz, the -3-dB bandwidth can be simultaneously tuned between ~50 and ~78 MHz, with an insertion loss smaller than 5 dB and a return loss greater than 13 dB at the center frequency. The surface areas of the fixed and tunable 0.7-GHz filters are, respectively, ~16 and ~20 cm2

In this letter, a traveling-wave single-pole double-throw (SPDT) switch using slow-wave coplanar waveguides is implemented in a 65-nm triple-well CMOS process. For performance improvement, double-well body-floating technique is used. The p-well layer and deep n-well layer of nMOSFET being, respectively, biased to -1.4 and 2.0 V, the measured SPDT exhibits an insertion loss of 2.8 dB and an isolation of 20 dB at 60 GHz. A measured input 1-dB compression point (ICP1dB) of 17 dBm is obtained at 35 GHz (16.3 dBm at 60 GHz by simulation). The total chip size is only 0.42 mm2 (780 μm× 540 μm) including all testing pads.

This letter presents an original method based on Patterned Shielded CoPlanar Waveguides transmission lines (patterned S-CPW TLines) for the wideband characterization of thin dielectric materials, up to millimeter-wave frequencies. The proposed method is easy to use and a very promising candidate to reach a better precision than classical methods. The dynamic for the relative permittivity (respectively the dielectric loss tangent) determination is 3.8 times (respectively, 1.9 times) higher compared to classical methods. The method is experimentally validated by the characterization of a thin SiO2 layer (1 μm).