78 results on '"Benini, L"'
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2. A scalable algorithm for RTL insertion of gated clocks based on ODCs computation
3. Architectures and synthesis algorithms for power-efficient bus interfaces
4. Exploration and Optimization of 3-D Integrated DRAM Subsystems
5. An OpenMP Compiler for Efficient Use of Distributed Scratchpad Memory in MPSoCs
6. Fine-Grained Power and Body-Bias Control for Near-Threshold Deep Sub-Micron CMOS Circuits
7. Design of a Solar-Harvesting Circuit for Batteryless Embedded Systems
8. Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits
9. Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms
10. Modeling and Optimization of a Solar Energy Harvester System for Self-Powered Wireless Sensor Networks
11. A Reactive and Cycle-True IP Emulator for MPSoC Exploration
12. Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors
13. Feature - NoC emulation: a tool and design flow for MPSoC
14. Microelectrodes on a Silicon Chip for Label-Free Capacitive DNA Sensing
15. A Pattern-Mining Method for High-Throughput Lab-on-a-Chip Data Analysis
16. Feature - Circuits and systems for high-throughput biology
17. Automated DNA Fragments Recognition and Sizing Through AFM Image Processing
18. Automatic Intrinsic DNA Curvature Computation From AFM Images
19. An efficient profile-based algorithm for scratchpad memory partitioning
20. Pervasive Computing for Interactive Virtual Heritage
21. Error control schemes for on-chip communication links: the energy-reliability tradeoff
22. Analysis of Error Recovery Schemes for Networks on Chips
23. Integrated task scheduling and data assignment for SDRAMs in dynamic applications
24. Specification and analysis of power-managed systems
25. A class of code compression schemes for reducing power consumption in embedded microprocessor systems
26. Memory energy minimization by data compression: algorithms, architectures and implementation
27. Feature - Xpipes : a network-on-chip architecture for gigascale systems-on-chip
28. Scheduling battery usage in mobile systems
29. Discharge current steering for battery lifetime optimization
30. Systemc cosimulation and emulation of multiprocessor soc designs
31. Virtual simulation of distributed IP-based designs
32. Layout-driven memory synthesis for embedded systems-on-chip
33. Networks on chips: a new SoC paradigm
34. Discrete-time battery models for system-level low-power design
35. Event-driven power management
36. Energy-efficient design of battery-powered embedded systems
37. Designing low-power circuits: practical recipes
38. Software-controlled processor speed setting for low-power streaming multimedia
39. Synthesis of power-managed sequential components based on computational kernel extraction
40. Battery-driven dynamic power management
41. Glitch power minimization by selective gate freezing
42. A survey of design techniques for system-level dynamic power management
43. A multilevel engine for fast power simulation of realistic input streams
44. Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation
45. Policy optimization for dynamic power management
46. Reducing switching activity on datapath buses with control-signal gating
47. Automatic synthesis of large telescopic units based on near-minimum timed supersetting
48. Power optimization of core-based systems by address bus encoding
49. Robust RTL power macromodels
50. Telescopic units: a new paradigm for performance optimization of VLSI designs
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