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A novel dual-metal gate technology that uses a combination of Mo-Mo[Si.sub.x] gate electrodes is proposed. On the SiO2 gate dielectric, Mo-Mo[Si.sub.x] combination could be appropriate not only for devices with advanced transistor structures but also for conventional bulk devices if arsenic preimplantation is adopted.

A fully functioning programmable voltage standard chips with double- and triple-stacked MoSi2 barrier Josephson junctions with over 100,000 junctions operating simultaneously on a 1cm x 1 cm chip are presented. The maximum output voltages of the double- and triple-stacked chips are 2.6 V and 3.9 V, with respective operating current margins of 2 mA and 1 mA.

Stacking enables the junctions to be packed more densely thus increasing design flexibility and margins for the microwave circuits. The measurements from two- and three- junction stacks for application to ac Josephson voltage standards of circuits having MoSi2 barriers is presented.

Tall, uniform stacked Josephson junction arrays are made by developing an etch process using an inductively coupled plasma etcher. Dc and microwave electrical characteristics of distributed and lumped arrays and the technological improvements needed to fabricate lumped arrays for voltage-standard applications are described.