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The Volterra framework plays an important role in digital pre-distortion (DPD) for power amplifier (PA) linearization. In practice, the full-Volterra (FV) model is avoided due to the so-called curse of dimensionality, which has motivated several Volterra pruning techniques in the literature. However, choosing the pruned-Volterra structure with a given complexity that most accurately describes a PA or DPD with unknown characteristics often requires trial and error. The motivation of this article is to propose a reduced-Volterra model that extends traditional memory polynomials, e.g., the generalized memory polynomial (GMP), by including higher-dimensional terms in a flexible and controlled way, avoiding the curse of dimensionality of the Volterra model and resulting in a model that can apply to a wide range of PA and DPD. Furthermore, the article investigates the parsimonious sizing of the proposed model using least absolute shrinkage and selection operator (LASSO) and sparse-group LASSO (SGL) convex optimization, significantly reducing the model’s running cost, while preserving its performance. In our experimental validation, the sparse versions of the proposed model achieved 3 dB better adjacent channel power ratio (ACPR) than the conventional GMP model for the same or lower DPD running cost, at the expense of a more costly estimation, which is performed off-line.

This paper proposes a novel predistorter architecture suitable for hybrid baseband/RF implementation. The distortion function is split into a memory polynomial and an AM/AM only look-up table (LUT). The memory polynomial function is to be applied in the baseband digital domain whereas the LUT predistorter is suitable for low complexity implementation in either the baseband digital or the RF analog domains. The proposed model was compared to benchmark models using 20MHz and 40MHz wide 5G test signals, and found to be superior in terms of adjacent channel leakage ratio performance and complexity. Experimental results showed that the model can achieve ACLR levels of better than −50dBC with a relatively low number of coefficients. The proposed model requires around 20% less coefficients than the reverse twin-nonlinear two-box model, and achieves slightly better ACLR while easing the analog implementation of the static nonlinearity predistortion function. Most importantly, the low-complexity hybrid implementation of the proposed model can drastically reduce the speed requirements in the digital to analog converter of the signal transmit path by up to 80% when compared to traditional DPD systems.

In this paper, an efficient neural-network-based adaptive DPD design which performs well under power varying conditions is presented. The DPD design is derived on the basis of the envelop time-delay neural network (ETDNN). The redefined ETDNN-DPD requires the part of parameter updates, which enables to adapt it to the rapid change of power amplifier (PA) distortion. Additionally, the redefined ETDNN-DPD also maintains the stability of the compensation performances under varying power condition while its structure is pruned by the structured pruning. Furthermore, to verify its practical use, we also propose the weight scaling technique, which reduces multiplications of the redefined ETDNN-DPD, and applied it to the implementation of the redefined ETDNN-DPD on FPGA. Compared FPGA-implemented ETDNN-DPD with FPGA-implemented conventional memory polynomial DPD, we verified that our proposed DPD achieved 3.2 dB better error vector magnitude (EVM) while lower hardware resource utilization at the fixed power level. Moreover, our proposed DPD kept better performance under the varying power condition only by the partial update of its parameters than memory polynomial DPD.

With the rise of 5G and beyond, the ever-increasing data-rates demanded by mobile access are severely challenging the capacity of optical fronthaul networks. Despite its high reliability and ease of deployment, legacy digital radio-over-fiber (RoF) technologies face an upcoming bandwidth bottleneck in the short term. This has motivated a renewed interest in the development of analog RoF alternatives, owing to their high spectral efficiency. However, unlike its digital counterpart, analog RoF transmission requires a highly linear transceiver to guarantee signal fidelity. Typical solutions exploited in recent research works tend to adopt the use of bulky benchtop components, such as directly modulated lasers (DML) and photodiodes. Although this provides a convenient and quick path for proof-of-concept demonstrations, there is still a considerable gap between lab developments and commercial deployment. Most importantly, a key question arises: can analog-RoF transceivers meet the 5G requirements while being competitive in terms of cost and footprint? Following this challenge, in this work we exploit the use of a low-cost commercial off-the-shelf (COTS) small form-factor pluggable (SFP) transceiver, originally designed for digital transmission at 1 Gbps, which is properly adapted towards analog RoF transmission. Bypassing the digital electronics circuitry of the SFP, while keeping the original transmitter optical sub-assembly (TOSA) and receiver optical sub-assembly (ROSA), we demonstrate that high-performance 5G-compatible transmission can be performed by reusing the key built-in components of current low-cost SFP-class transceivers. Particularly, we demonstrate error vector magnitude (EVM) performances compatible with 5G 64QAM transmission both at 100MHz and 400MHz. Furthermore, employing a memory polynomial model for digital pre-distortion of the transmitted signal, we achieve 256QAM-compatible performance at 100MHz bandwidth, after 20 km fronthaul transmission.

This paper proposes an efficient neural-network-based digital predistortion (DPD), named as envelope time-delay neural network (ETDNN) DPD. The method complies with the physical characteristics of radio-frequency (RF) power amplifiers (PAs) and uses a more compact DPD model than the conventional neural-network-based DPD. Additionally, a structured pruning technique is presented and used to reduce the computational complexity. It is shown that the resulting ETDNN obtained after applying pruning becomes so sparse that its complexity is comparable to that of conventional DPDs such as memory polynomial(MP) and generalized memory polynomial (GMP), while the degradation in performance due to the pruning is negligible. In an experiment on a 3.5-GHz GaN Doherty power amplifier (PA), our method with the proposed pruning had only one-thirtieth the computational complexity of the conventional neural-network-based DPD for the same adjacent channel leakage ratio (ACLR). Moreover, compared with memory-polynomial-based digital predistortion, our method with the proposed pruning achieved a 7-dB improvement in ACLR, despite it having lower computational complexity.

In this paper, a software-defined radio (SDR) based transceiver system is designed and implemented on the system-on-chip (SoC) platform, which consists of a high-speed Arm embedded processor and a reconfigurable field-programmable gate array (FPGA). In the proposed SDR transceiver, the real-time baseband signal generation and adaptive digital predistortion (ADPD) units are implemented on the SoC platform. Memory polynomial model based ADPD solution is implemented to linearize the radio frequency (RF) power amplifiers (PAs). The implementation of the ADPD on a reconfigurable FPGA platform makes the system flexible and cost-effective. The PA characterization, in terms of model extraction and coefficient calculation, is done in real-time. These calculated coefficients are updated in the transmission path to precondition the transmitted signal before it is applied to the PA. The proposed ADPD is applied at the baseband level. Therefore, it can be used for different classes of PA operating at different RF carrier frequencies. A long-term evolution (LTE) signal with 20 MHz bandwidth and 11 dB peak to average power ratio (PAPR) is used for simulation and measurement purposes. The LTE signal is amplified using a GaN-based harmonically tuned continuous Class-F PA in measurement. The performance of the implemented ADPD scheme is analyzed in terms of NMSE, ACPR and EVM.

This paper introduces the measurement/modeling of a nonlinear RF power amplifier (PA) model extraction of spectral overlaps and peak-to-average power ratio (PAPR). The modeling consists of a weighted cubic-spline basis approach that preserves a relationship by its generic asymptotic properties under adequate PAPR regime to estimate signaling conditions. To jointly provide a data-driven model a field-programmable gate array (FPGA) testbed is proposed, in which a precomputed approach with deterministic signals is used to perform: (i) parameter estimation; (ii) adequate PAPR levels; (iii) reinforcement of sparsity data with extrapolation fitting; and (iv) FPGA implementation. Moreover, a technique for parameter identification is introduced to provide insights of a digital predistortion (DPD) PA model extraction with cubic-spline to efficiently improve the linearization performance. A theoretical analysis that states on the benefits from coefficients precomputation to preserve multiple-input multiple-output (MIMO) relationship with antenna selection technique estimation, is also proposed. Also, a Cholesky FPGA algorithm implementation to matrix inversion is validated, which aims to show the good numerical and computational complexity for up to $64\times 64$ MIMO arrays. Experimental results prove a good accuracy and close agreement between the modeling and estimation yielding a reliable model with a little overfitting.

We demonstrate experimentally, for the first time, a distributed digital predistortion model for radio-over-fiber (RoF) downlink suitable for broadband 5G signals. The model reduces the analog-to-digital converter sampling frequency up to 1/3 of the required sampling in the example of the conventional memory polynomial DPD model, hence reducing demodulator costs and hardware complexity. This model also provides better intercarrier interference by reducing the adjacent channel leakage ratio (ACLR). This leads to reduced crosstalk, which impacts the multi-core and multimode RoF links. Long-term evolution advanced signals of a 256-quadratic-amplitude modulation of different bandwidths are used to validate the model. We achieved an average reduction of 2.5 dB in ACLR for signal bandwidths in the range 100–300 MHz while maintaining minimum error vector magnitude (EVM). The RoF downlink can deliver a peak bit rate of 2.016 Gb/s with a spectral efficiency of 6.72 b/Hz and EVM less than 4%.

The analog front of the direct conversion transmitter suffers from the effects of various unavoidable nonlinearities, such as local oscillator (LO) leakage, power amplifier (PA) nonlinearities, and in-phase and quadrature (I/Q) branch amplitude and phase imbalance, etc. To overcome these nonlinear effects, an accurate three-input nonlinear model is proposed for joint compensation of frequency-dependent I/Q imbalance and PA nonlinear distortion in this paper. The proposed nonlinear model is an augmented version of the modulator I/Q imbalance compensation model, where the magnitudes of the input signal are included as the model input, and a three-input nonlinear compensation model with linear parameters is developed. The advantage of the proposed model is that the augmented envelope-dependent terms can produce the basis function sets for compensating the PA nonlinear distortions in the transmitter. Furthermore, the computational complexity of the proposed model is analyzed in detail for practical digital implementation. To verify the validity of the proposed model, the imperfect transmitters based on single-device gallium nitride (GaN) PA and GaN Doherty PA, which are driven by different communication signals, are used for experimental verification and analysis. The experimental results show that the proposed model is able to give improved modeling and distortion mitigation capability than the other reported I/Q imbalance compensation methods when the effects of I/Q imbalance and nonlinear characteristics of PA are considered together.

Multiple-input multiple-output (MIMO) beamforming array gain can make multi-antenna transmitters (TXs) more power efficient. However, these MIMO TXs require more complex digital predistortion (DPD). In this brief, analytical expressions are derived for the power consumption of both MIMO power amplifier (PA) arrays and their respective DPD, taking into account the effects of precoding on PA output power and peak-to-average power ratio (PAPR). It is shown that for complex DPD algorithms such as cross-over DPD (CO-DPD) in combination with wide bandwidths, the overall DPD power consumption can exceed the overall PA power consumption already for scenarios with more than two antennas. [ABSTRACT FROM AUTHOR]

The light-emitting diode (LED) is the major source of nonlinearity in LED communications, and the nonlinearity needs to be effectively modeled and mitigated to avoid the degradation of communication performance. In indoor LED communications, multipath dispersion can lead to inter-symbol interference (ISI) at high data rates. In this paper, we jointly estimate the LED nonlinearity and ISI channel based on an orthogonal polynomial based technique. Then, frequency domain equalization and post-distortion are adopted to mitigate the ISI and nonlinearity. Simulation results are provided to demonstrate the effectiveness of the proposed technique.

The light-emitting diode (LED) is the major source of nonlinearity in LED communications, and the nonlinearity needs to be effectively modeled and thereby mitigated through predistortion or postdistortion to avoid degradation of communication performance. A memory polynomial is often used for LED nonlinearity modeling and mitigation in the literature. However, the estimation of memory polynomial coefficients suffers from numerical instability, resulting in inaccurate modeling and poor performance in nonlinearity mitigation. In this paper, we propose an orthogonal polynomial-based nonlinearity modeling and mitigation technique for LED communications with pulse amplitude modulation (PAM) signaling and show that the proposed technique significantly outperforms the conventional memory polynomial-based techniques.

The light-emitting diode (LED) is the major source of nonlinearity in LED communications, and the nonlinearity needs to be effectively modeled and mitigated to avoid the degradation of communication performance. In indoor LED communications, multipath dispersion can lead to inter-symbol interference (ISI) at high data rates. In this paper, we jointly estimate the LED nonlinearity and ISI channel based on an orthogonal polynomial based technique. Then, frequency domain equalization and post-distortion are adopted to mitigate the ISI and nonlinearity. Simulation results are provided to demonstrate the effectiveness of the proposed technique. [ABSTRACT FROM AUTHOR]

The light-emitting diode (LED) is the major source of nonlinearity in LED communications, and the nonlinearity needs to be effectively modeled and thereby mitigated through predistortion or postdistortion to avoid degradation of communication performance. A memory polynomial is often used for LED nonlinearity modeling and mitigation in the literature. However, the estimation of memory polynomial coefficients suffers from numerical instability, resulting in inaccurate modeling and poor performance in nonlinearity mitigation. In this paper, we propose an orthogonal polynomial-based nonlinearity modeling and mitigation technique for LED communications with pulse amplitude modulation (PAM) signaling and show that the proposed technique significantly outperforms the conventional memory polynomial-based techniques. [ABSTRACT FROM PUBLISHER]

In this paper, a novel weighted memory polynomial (WMP)-based model is proposed for wireless transmitters and radio-frequency power amplifiers' (PAs) behavioral modeling and predistortion. The new model introduces an instantaneous-power-dependent weight function on the static and dynamic terms of the conventional memory polynomial (MP) model. Experimental validation in both modeling and predistortion contexts was performed on a PA prototype driven by a 20-MHz Long Term Evolution signal. The proposed model was assessed against the standard MP model. The experimental results demonstrate the superiority of the proposed polynomial in behavioral modeling applications as it results in up to 50% (3-dB) improvement in the normalized mean square error for the same number of coefficients. The model robustness was then validated by using a second test signal applied to two Doherty PAs using different transistor technologies. Furthermore, when applied for digital predistortion, the proposed WMP function achieves the same performance as the state-of-art MP while requiring approximately 50% less coefficients. [ABSTRACT FROM PUBLISHER]

Accurately modeling the memory effects is critical in modeling and nonlinearity pre-compensation for wideband radio frequency (RF) power amplifiers (PAs) with strong memory effects. In this paper, the memory effects are divided into two categories: lagging memory effect and leading memory effect, which are defined based on the input samples located after and before the current output samples, separately. Considering the above two types of memory effects, a generalized two-box cascaded (GTBC) nonlinear behavioral model for RF PAs with strong memory effects is proposed: one box for a static nonlinearity block that is used to include the strong static nonlinearities and the other box for a dynamic nonlinearity block which is used to predict the mild dynamic nonlinearities. The modeling accuracy of the proposed model, in terms of the normalized mean square error (NMSE) and the memory effect intensity (MEI), is compared to the generalized memory polynomial (GMP), the augmented Hammerstein (AH) and the enhanced Hammerstein (EH) models for a 450-470 MHz Doherty PA with a three-carrier WCMDA input signal and a 895-935 MHz inverse Class-F Doherty PA with a single-carrier FDD-LTE OFDM input signal. The validation demonstrates that the proposed model leads to high-accuracy with fewer modeling coefficients and floating point operations (FLOPs). [ABSTRACT FROM AUTHOR]

In modern communication systems, nonlinearity in power amplifiers (PAs) and in-phase and quadrature-phase (I/Q) imperfections in the transmitter are of enormous concern. With the increase in the importance for highly energy efficient and low complexity models, there is a need to develop low complexity digital predistortion (DPD) methods. In this paper, we present a novel memory polynomial based distributed two block model to alleviate these impairments. Various performance metrics are used to evaluate the design performance and complexity of proposed model as compared to the state of the art predistorter model. Simulation and measurement results indicate the ability of the proposed model to meet the desired design purpose with reduced complexity in terms of number of coefficients, dispersion coefficient, condition number and number of floating points operations required for computing various steps in the inverse modeling algorithm. This is achieved while maintaining reasonable performances in terms of NMSE and ACEPR. The major attribute of the model is the reduction in complexity of the system. The number of complex valued coefficients and the number of floating point operations (FLOPs) are both reduced by 17%–56%, matrix conditioning is improved by 12–33 dB and the dispersion coefficient is reduced by 16–42 dB as compared to the previously proposed joint modulator and power compensation technique. [ABSTRACT FROM AUTHOR]

Power amplifiers are widely used in RF broadcasting applications. However, they tend to exhibit nonlinear behavior that distorts the input signals both in the time and frequency domains, consequently motivating the development of techniques, such as digital predistortion, which can counteract this behavior. Among the challenges facing the identification of an amplifier's digital predistorter and behavioral model is finding the correct model dimensions, as this requires a priori knowledge of multiple parameters. In this paper, a predistorter based on a cluster-based implementation particle swarm optimization technique with embedded model-size estimation capability is presented. The validation of the proposed technique on a Doherty power amplifier prototype demonstrates its ability to efficiently find the dimensions of a memory polynomial based digital predistorter, while accurately estimating its coefficients. [ABSTRACT FROM PUBLISHER]

This paper presents a study of performance evaluation metrics for behavioral models of power amplifiers and transmitters. A novel normalized absolute mean spectrum error criterion is proposed as a performance evaluation metric along with a method for accurate benchmarking of behavioral models and their ability to predict the in-band response, static nonlinearity, and memory effects of the device under test. The proposed metric and method are validated with a study of different memory polynomial based models, focusing on the model accuracy, complexity, and identification robustness. This experimental validation highlights the robustness of the proposed metric and its ability to accurately quantify the performance of several behavioral models in predicting the static nonlinearity and memory effects of the device under test for several test conditions. In addition, the results of the comparative study between the memory polynomial models are used to propose a hybrid memory polynomial model. The superiority of the proposed model is assessed by comparing its performance to that of the studied memory polynomial models. [ABSTRACT FROM AUTHOR]

In this letter, a new pre-distortion technique for power amplifiers in wideband applications is proposed. The proposed pre-distortion technique is based on Nonlinear Autoregressive with Exogenous inputs (NARX). The forward path of the proposed predictive method is based on the memory polynomial. Experimental validation is carried out with 4 carrier WCDMA signal with 20MHz bandwidth and \textPAPR=9.8\ \textdB. The results show significant reduction in the number of coefficients with comparable performance in terms of adjacent channel leakage ratio (ACLR) and error vector magnitude (EVM) to Volterra series techniques. [ABSTRACT FROM PUBLISHER]

We consider distortion of a Gaussian signal by a memory polynomial system and prove a theorem about a linear representation of the output. As an application example, we analyze an OFDM system with a nonlinear high power amplifier at the transmitter. [ABSTRACT FROM AUTHOR]

Conventional radio-frequency (RF) power amplifiers operating with wideband signals, such as wideband code-division multiple access (WCDMA) in the Universal Mobile Telecommunications System (UMTS) must be backed off considerably from their peak power level in order to control out-of-band spurious emissions, also known as ‘spectral regrowth.’ Adapting these amplifiers to wideband operation therefore entails larger size and higher cost than would otherwise be required for the same power output. An alternative solution, which is gaining widespread popularity, is to employ digital baseband predistortion ahead of the amplifier to compensate for the nonlinearity effects, hence allowing it to run closer to its maximum output power while maintaining low spectral regrowth. Recent improvements to the technique have included memory effects in the predistortion model, which are essential as the bandwidth increases. In this paper, we relate the general Volterra representation to the classical Wiener, Hammerstein, Wiener-Hammerstein, and parallel Wiener structures, and go on to describe some state-of-the-art predistortion models based on memory polynomials. We then propose a new generalized memory polynomial that achieves the best performance to date, as demonstrated herein with experimental results obtained from a testbed using an actual 30-W, 2-GHz power amplifier. [ABSTRACT FROM AUTHOR]

In this letter, a compact envelope-memory polynomial based model, suitable for forward and reverse modeling of weakly nonlinear wireless transmitters and power amplifiers (PAs) exhibiting electrical memory effects, is presented. This model is implemented in a complex gain based architecture and takes advantage of the dependency of PA nonlinearity on the magnitude of the input signal. Contrary to conventional memory polynomials, the proposed model can be implemented in baseband, as well as in radio frequency, digital predistorters. A 100-W average power transmitter is used for experimental validation of the forward and reverse models. Both forward and reverse modeling results obtained with the proposed model are comparable to that of the conventional memory polynomial. [ABSTRACT FROM PUBLISHER]

In this letter, the effects of delay alignment between the input and output baseband waveforms on the performance of a radio frequency transmitters' memory polynomial based model are studied. A 100-W average power transmitter is characterized; various delay values are applied to align the input and output data; and, a model is derived for each delay value. The models' performances, evaluated for these delay values both in time and frequency domains, demonstrate that the memory polynomial model is sensitive to delay overestimation but not to delay underestimation. It is established that a delay underestimation by up to one sampling period does not affect the performance of the identified model. This overcomes the need for the signal oversampling required for high-resolution delay alignment. Consequently, the computational complexity of the digital signal processing algorithm employed for delay estimation and alignment is considerably reduced. [ABSTRACT FROM PUBLISHER]

Amplification of signals with fluctuating envelopes inevitably leads to distortion because of nonlinear behavior of the power amplifier (PA). Digital predistortion can counteract these nonlinear effects. In this letter, the crosscorrelation predistorter is described and the effects of quantization in the feedback path are presented. One of the effects is that the quantization noise is correlated with the signal to be quantized, resulting in reduced performance of predistortion. A technique to reduce these effects is to inject a dither signal before quantization. Because of the quantization noise and dither signal, more data has to be used to obtain estimates of the PA behavior that are accurate enough for effective predistortion. [ABSTRACT FROM PUBLISHER]