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A high-speed and power-efficient heterogeneous octa-core CPU complex is realized in a 7nm FinFET process. On-chip sensors that handle guard band in terms of process $(V_{PGB})$, voltage, temperature $(V_{TGB})$, and aging $(V_{AGB})$ are designed for power enhancement in dynamic frequency and voltage scaling (DVFS). A process sensor (P-sensor) is used to determine per-die V PGB for Smartphone operation voltage $(V_{sov})$ with machine learning (ML). A temperature sensor (T-sensor) senses run-time local thermal and temperature inversion (T-inversion) to scale V TGB in DVFS. An aging sensor (A-sensor) converts cell degradation to corresponding V AGB for aging compensation. Lastly, a voltage sensor (V-sensor) sustains system stability against supply noise. With sensor assistance, the CPU performs up to 2.8GHz speed with 13% power improvement in a fully integrated 5G multi-mode Smartphone SoC that supports the sub-6GHz band with 2.6Gbps upload and 4.7Gbps download speeds.

In this paper, a B-spline neural network (BNN) with a set of local basis functions is used to online approximate the unknown nonlinear system dynamics. The BNN has the advantage of locally controlling its network output compared with other neural networks; therefore, it is suitable to online estimate the unknown nonlinear system dynamics. Meanwhile, this paper proposes an adaptive B-spline neural network control (ABNNC) system via backstepping approach for a class of second-order unknown nonlinear plants. A computation controller and a fuzzy compensator are designed in the proposed ABNNC system. The computation controller which is designed in the sense of backstepping approach is the main controller, and the fuzzy compensator is designed to eliminate the effect of the approximation error introduced by the BNN approximator. A parameter adaptation training methodology, which is derived using the Lyapunov stability theorem, is proposed to increase the learning capability of the BNN. Finally, an inverted pendulum system is applied to demonstrate the effectiveness of the proposed ABNNC scheme. The simulation results show that the ABNNC system can achieve good tracking responses without any knowledge of control dynamics.

A single-chip solution for COMBO driver applications is presented. The approach features a multiple-word accessing mechanism to reduce SDRAM bandwidth requirement. After fabrication in 0.22/spl mu/m 1P5M CMOS process, the proposed COMBO SoC supports a 16x DVD speed with 965mW power consumption.