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3. Implementation of Functionally Complete Boolean Logic and 8-Bit Adder in CMOS Compatible 1T1R RRAMs for In-Memory Computing

Author

Simon M. Sze, Zhuo-Rui Wang, Kan-Hao Xue, Yu-Ting Su, Ting-Chang Chang, Kang-Sheng Yin, Yi Li, Ya-Xiong Zhou, Long Cheng, and Xiang-Shui Miao

Subjects
010302 applied physics, Adder, Computational complexity theory, Computer science, 8-bit, 02 engineering and technology, Parallel computing, Construct (python library), 021001 nanoscience & nanotechnology, 01 natural sciences, Resistive random-access memory, symbols.namesake, In-Memory Processing, Logic gate, 0103 physical sciences, symbols, 0210 nano-technology, Von Neumann architecture
Abstract

RRAM is a promising candidate to construct in-memory computing architecture which can break through the von Neumann bottleneck. Taking advantage of the CMOS compatible 1T1R RRAM, functionally complete Boolean logics can be realized within two steps in a single unit that can suppress sneak pass problem and avoid cascading problem partially. In addition, an 8-bit pre- calculation adder with low computation complexity is designed and demonstrated experimentally to verify the feasibility and efficiency of 1T1R based in-memory computing architecture, which is applicable to future energy-efficient information processing systems.

Published
2018

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