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We present a novel p-gallium nitride (GaN) gate HEMT structure with reduced hole concentration near the Schottky interface by doping engineering in metal-organic chemical vapor deposition (MOCVD), which aims at lowering the electric field across the gate. By employing the additional unintentionally doped GaN (u-GaN) layer, the gate leakage current is suppressed and the gate breakdown voltage is boosted from 10.6 to 14.6 V with negligible influence on the threshold voltage and ON-resistance. A reduced Mg concentration in the u-GaN layer was confirmed by secondary-ion mass spectrometry. Time-dependent gate breakdown measurements reveal that the maximum gate drive voltage increases from 6.2 to 10.6 V for a ten-year lifetime with a 1% gate failure rate, which effectively expands the operating voltage margin of the p-GaN gate HEMTs without any other additional process step. [ABSTRACT FROM AUTHOR]

In this work, we studied the gate breakdown (BD) mechanisms of p-GaN gate AlGaN/GaN HEMTs by a novel multiple-gate-sweep-based method. For the first time, three different BD mechanisms were observed and identified separately in the same devices: the metal/p-GaN junction BD, the p-GaN/AlGaN/GaN junction BD, and the passivation-related BD. This method is an effective method to determine the BD mechanisms. The different BD mechanisms were further confirmed by scanning electron microscopy (SEM). Finally, the temperature dependences of the three BD mechanisms were measured and compared. This analysis method was also employed in the devices with a different passivation material and showed its applicability. [ABSTRACT FROM AUTHOR]

This article introduces an efficient method to determine the dielectric model parameters of a thin film substrate from microstrip line measurements and electromagnetic analysis. The proposed method avoids using optimization algorithms which normally require extensive computation time. The complex permittivity is extracted through only one full-wave simulation. The multipole Debye model was employed to fit the extracted complex permittivity. The parameters of the best-fitting model obtained through this procedure are considered as the final results, which also ensure physically consistent characteristics. Polyimide was selected to validate the methodology. The best-fitting model generated by the proposed method has shown excellent agreement to the polyimide data sheet values at 1 MHz. Moreover, simulations using the parameters of the best-fitting model exhibit good agreement with the experimental propagation constant data of microstrip lines up to 60 GHz. [ABSTRACT FROM AUTHOR]

In this article, single-layer intrinsic and fluorinated graphene were investigated as gate insertion layers in normally- OFF p-gallium nitride (GaN) gate high electron mobility transistors (HEMTs), which wraps around the bottom of the gate forming Ti/graphene/p-GaN at the bottom and Ti/graphene/SiNx on the two sides. Compared to the Au/Ti/p-GaN HEMTs without graphene, the insertion of graphene can increase the ION/IOFF ratios by a factor of 50, increase the VTH by 0.30 V and reduce the OFF-state gate leakage by 50 times. Additionally, this novel gate structure has better thermal stability. After thermal annealing at 350 °C, gate breakdown voltage (BV) holds at 12.1 V. This is considered to be a result of the 0.24 eV increase in Schottky barrier height and the better quality of the Ti/graphene/p-GaN and Ti/graphene/SiNx interfaces. This approach is very effective in improving the ION/IOFF ratio and gate BV of normally- OFF GaN HEMTs. [ABSTRACT FROM AUTHOR]

Side and top silicon nitride stressors were proposed and shown to be effective in reducing the threshold current $I_{{\rm{th}}}$ and in improving the wall-plug efficiency $\eta _{{\rm{wp}}} of Ge-on-Si lasers. Side stressors only turned out to be a more efficient way to increase \eta\mathbf{wp} than using the top and side stressors together. With the side stressors and geometry optimizations, a \eta\mathbf{wp} of 34.8% and an $I_{{\rm{th}}}$ of 36 mA ($J_{{\rm{th}}} of 27 kA/cm2) can be achieved with a defect limited carrier lifetime ( \tau p,n) of 1 ns. With \tau p,n = 10\ \;{\rm{ns}}, an $I_{{\rm{th}}}$ of 4 mA ( $J_{{\rm{th}}}$ of 3 kA/cm2) and a \eta_{\mathbf{wp}} of 43.8% can be achieved. These are tremendous improvements from the case with no stressors. These results give strong support to the Ge-on-Si laser technology and provide an effective way to improve the Ge laser performance. [ABSTRACT FROM PUBLISHER]

The near-surface stress distribution around Cu through-silicon vias (TSVs) was studied by micro-Raman spectroscopy along with finite-element analysis from room temperature to 100 ^\circ\C . Temperature-dependent measurements, along with simulations, revealed that the stresses near TSVs can have two components: 1) the preexisting stress before copper filling; and 2) the coefficients of thermal expansion (CTE) -mismatch-induced stress. The CTE-mismatch-induced stress resulted in a mobility change, and a keep-out zone (KOZ) at elevated temperatures was also estimated, where the KOZ was defined as the region with a mobility change larger than or equal to 10%. Higher temperatures were shown to reduce the CTE-mismatch-induced stress component and resulted in the shrinkage of KOZs in Si. The preexisting stress was shown to be significant in a region equal to or larger than the KOZs induced by the CTE-mismatch-induced stress only and should be characterized and considered in the KOZ determination and the circuit design. [ABSTRACT FROM PUBLISHER]

The impact of processing factors such as ion implantation and rapid thermal annealing on mobility enhancement in strained-Si n-channel metal-oxide-semiconductor field-effect transistors (n-MOSFETS) has been investigated. Long-channel strained-Si and bulk n-MOSFETs were fabricated with various channel-region implant doses and thermal budgets. Neutral Si and Ge species were used to study the impact of the implant damage on mobility separately from ionized impurity scattering effects. Electron mobility enhancement is shown to degrade considerably when the implant dose is above a critical dose for a given thermal budget. Transmission electron microscopy, secondary ion mass spectrometry and Raman spectroscopy were used to investigate the mobility degradation mechanisms. Residual implant damage and implant damage enhanced Ge up-diffusion into the Si are shown to be responsible for the mobility degradation. Two-dimensional damage simulations of 30-nm scale MOSFETs are used to examine potential technological implications of these findings. [ABSTRACT FROM AUTHOR]

This letter systematically investigates the origin of gate-induced floating-body effect (GIFBE) in partially depleted silicon-on-insulator p-type MOSFETs. The experimental results indicate that GIFBE causes a reduction in the electrical oxide field, leading to an underestimate of negative-bias temperature instability degradation. This can be partially attributed to the electrons tunneling from the process-induced partial \n^+ polygate. However, based on different operation conditions, we found that the dominant origin of electrons was strongly dependent on holes in the inversion layer under source/drain grounding. This suggests that the mechanism of GIFBE at higher voltages is dominated by the proposed anode electron injection model, rather than the electron valence band tunneling widely accepted as the mechanism for n-MOSFETs. [ABSTRACT FROM AUTHOR]