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It is shown that surface roughness becomes increasingly important as oxide thicknesses decrease. Silicon-silicon dioxide capacitances with thicknesses of 7 nm, 15 nm, and 50 nm are measured with an atomic force microscope (AFM). The height data thusly obtained is used to create three dimensional simulation structures to reproduce measurement data obtained from leakage current measurements. The leakage currents are simulated using the Fowler-Nordheim (FN) tunnelling current model

Focused ion beam (FIB) systems are widely used for device modifications during the design debugging phase of integrated circuits (IC's) development. Nevertheless, it appears necessary to further understand the interaction between the finely focused ion beam and IC's to assure that these modifications do neither induce electrostatic discharge of the devices nor degradation due to FIB irradiation induced damage. The purpose of this study is to analyze the focused ion beam interaction with n-MOSFET devices addressing irradiation damage related device degradation apart from charging effects. For the first time, monitoring of device parameters during ion beam exposure enables us to quantify the progressive nature of device degradation. By in-situ electrical sensing of the devices during focused ion beam exposure, the impact on device parameters (I/sub Dsat/, I/sub Off/, and mobility) is studied. The FIB exposed devices exhibit no damage related degradation as long as the milling is out of the reach of the active channel. Progressive degradation starts when long-range damage cascades extend into the channel region. The related damage can be attributed to mobility decrease in the channel region and is quantified by a semi-empirical mobility model. As a result we present an experimental setup that prevents ESD induced device degradation and allows the investigation of damage related device degradation. In combination with a moderate annealing process that mitigated FIB induced irradiation damage this enables successful modification of MOSFET devices even in the front end regime.

For the first time we demonstrate the capability of focused ion beams for engineering in the front end regime. We have shown that by a robust protection for MOSFET, Focused ion beam induced ESD degradation can be avoided and implantation induced damage could be well controlled and mitigated by a moderate RTA process. By a masked through gate implantation technique followed by a moderate annealing/activation process we have exemplarily modified the threshold voltage of test transistors on fully featured wafers whereby any unintentional change of devices nearby could be avoided.