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We present an electron-conductive, hole-blocking contact for silicon solar cell in this work. Quasi-metallic titanium nitride (TiN), deposited by reactive magnetron sputtering, is proven to be an effective electron-selective contact for silicon solar cell, simultaneously achieving a low contact resistivity (ρ c ) of ~ 16 mΩ∙cm2 and a tolerable contact recombination parameter (J 0c ) of ~ 500 fA/cm2. By the implementation of the dual-function SiO 2 /TiN contact, which acts simultaneously as efficient surface passivating and metal electrode, a power conversion efficiency of 20% is achieved on an n-type silicon solar cell with a simple structure. This work demonstrates a way to develop efficient n-type Si solar cells with dual-function metal nitride contacts at a low cost.

Minimizing carrier recombination losses at contact regions by using carrier-selective contact materials, instead of heavily doping the silicon, has attracted considerable attention for high-efficiency, low-cost crystalline silicon (c-Si) solar cells. Here we present a novel and stable metal nitride based hole-blocking layer for efficient silicon solar cells.The ALD-deposited tantalum nitride (TaN x ) films are demonstrated to provide excellent holeblocking property on silicon surfaces, due to their small conduction band offset and large valence band offset with silicon. Thin TaN x films are found to provide not only moderate surface passivation to silicon surfaces, but also allow a relatively low contact resistivity at the TaN x n-Si heterojunctions. An efficiency over 20% is achieved on n-type silicon solar cells featuring a simple full-area electron-selective TaN x contact, representing an absolute efficiency gain of 4.0% over the control device without TaN x contact.

Perovskite and silicon solar cells have recently been shown to be perfect partners for tandem devices with potentially very high efficiency at low additional costs over standard silicon cells. Here, we present the development of efficient perovskite top cells suitable for 4-terminal and monolithic tandem integration on silicon heterojunction bottom cells. We show a 4-terminal tandem measurement with 25.6% efficiency on small cells and 23.2 % on a 1 cm2fully integrated device. Monolithic tandems with >20% efficiencies were developed on several types of silicon wafers, allowing for a direct optical comparison. We identify parasitic absorption to be the limiting factor for high performance and discuss several practical solutions to reduce them.

In this work, we investigate the temperature and irradiance dependencies of the power output of silicon solar cell architectures (BSF, PERC, PERT, SHJ). When we compare our data with commercial module datasheets, we find that the temperature coefficient under maximum power point conditions is systematically worse in the modules. Following our analysis we attribute this to ohmic losses $(R_{\mathrm{CTM}})$ due to cell interconnection. Using energy yield calculations we show the impact of $R_{\mathrm{CTM} }$ on the energy production in moderate and hot and sunny climates for all investigated architectures. We conclude that maximizing energy production in hot and sunny environments requires not only a high open-circuit voltage, but also a minimal series-to-Ioad-resistance ratio.

Silicon solar cells reached record efficiencies close to their practical efficiency limit. A promising approach to further increase performance at low cost lies in combining silicon and perovskite solar cells to form a tandem device. Here, we present high-efficiency perovskite/silicon heterojunction tandem cells. From 4-terminal measurements, a total steady-state efficiency of up to 24.4% was obtained using maximum power point tracking. For monolithic tandems, which have the potential for higher performance but are more challenging to fabricate, efficiencies of 19.2% and 21.2% were reached on cell sizes of 1.22 and 0.17 cm2, respectively. These efficiencies are steady during >300 s of maximum power point tracking.

In recent years a significant amount of effort has been devoted towards the development of dopant-free carrier selective contacts for crystalline silicon (c-Si) solar cells. This short manuscript surveys a range of materials which have the potential to induce carrier-selectivity when applied to c-Si, including metals, metal oxides, alkali / alkaline earth metal salts, and organic conductors. Simple Ohmic test structures are used to assess the selectivity of these materials, that is, hole contacts are tested on p-type c-Si and electron contacts on n-type c-Si. Among these alternatives, a number of systems with exceptional potential are identified.

Hole and electron collectors in silicon heterojunction solar cells consist of hydrogenated amorphous silicon layer stacks deposited on the crystalline silicon wafer surfaces. Charge carrier extraction from these layers is achieved by electrodes consisting of a transparent conductive oxide and a metal layer. Earlier, the mere presence of the transparent conductive oxide layer on top of the hole collecting stack was shown to alter minority carrier lifetimes, at low minority injection levels, of the crystalline silicon absorber. In this work, we present a detailed investigation of the magnitude and nature of these effects and discuss their impact on silicon heterojunction solar cell performance for the different device architectures.

The silicon heterojunction (SHJ) technology has proven its ability to produce very high efficiency devices. Competitive production costs at the mass production level can be potentially reached by integrating latest technological developments. For example, a large variety of advanced layers can be implemented to reduce the parasitic absorption losses at the front side of the device. Progress in cell metallization (fine-line screen-printing and electroplating) allows also significant improvement in efficiency: a full-area 6″ CZ cell with 22.8% efficiency (busbar-less, measured with GridTouch) and with a Voc of 736 mV has been realized using industry-compatible processes. With thin wafers of 70–80 microns, Voc up to 747 mV are achieved. Using simple and size-scalable patterning methods, 9 cm2 interdigitated back-contacted SHJ cells have been produced, with efficiencies up to 22%. On the module level, multi-wire cell interconnection schemes offer opportunities for lower manufacturing costs. In addition, we show that the temperature coefficient of SHJ cells strongly depends on the cell structure. The transport through most buffer layers is improved with increasing temperature, leading in some cases to values below −0.1%/°C, with a thermally activated fill factor. We show finally how SHJ devices can be produced in a highly cost-effective way, i.e. allowing one to reach mass manufacturing costs at or even below those of PERC solar cells, while still ensuring higher efficiency and improved energy yield.

Carrier recombination at the metal contact regions has now become a critical obstacle to the advancement of high efficiency diffused junction silicon solar cells. The insertion of a thin dielectric interlayer - forming a metal-insulator-semiconductor (MIS) contact - is a known approach to reduce contact recombination. However, an insulator thickness less than 25 A is usually required for current transport, making it difficult to simultaneously achieve good surface passivation. This paper compares standard MIS contacts to a newly developed contact structure, involving hydrogenated amorphous silicon (a-Si:H) over-layers. The contact structures are trialed on both n+ and p+ lightly diffused surfaces, with SiO 2 and Al 2 O 3 insulator layers, respectively. In both cases significant improvements in the carrier-selectivity of the contacts is achieved with the addition of the a-Si:H over-layers. Simulations of idealized cell structures are used to highlight the performance and technological benefits of these carrier-selective structures over standard locally diffused contacts.

Efficient carrier selective contacts and excellent surface passivation are essential for solar cells to reach high power conversion efficiencies. Exploring MoO x as a dopant-free, hole-selective contact in combination with an intrinsic hydrogenated amorphous silicon passivation layer between the oxide and the crystalline silicon absorber, we demonstrate a silicon hetero-junction solar cell with a high open-circuit voltage of 711 mV and a power conversion efficiency of 18.8%. Compared to the traditional p-type hydrogenated amorphous silicon emitter of a traditional silicon heterojunction solar cell, we observe a substantial gain in photocurrent of 1.9 mA/cm2 for MoO x due to its wide band gap of 3.3 eV. Our results on MoO x have important implications for other combinations of transition metal oxides and photovoltaic absorber materials.

We report on the development of interdigitated back-contacted silicon heterojunction solar cells with conversion efficiencies well above 21%. Doped hydrogenated amorphous silicon layers, needed for electron and hole collection, are patterned via in-situ shadow masking whereas transparent conductive oxide and metal layers, of the back electrodes, are defined via hot melt inkjet printing of an etch resist and subsequent wet etching. Our technology is therefore photolithography-free and avoids any high-temperature step. The best fabricated solar cell presents a high short-circuit current density of 39.9 mA/cm2, an open-circuit voltage of 724 mV and a fill factor of 74.5% resulting in a conversion efficiency of 21.5%, with a strong upside potential. We report also on a silver-free IBC-SHJ solar cell with conversion efficiency >20%.

We examine the contribution of the inversion layer, present at the amorphous silicon/crystalline silicon interface, to the lateral conduction of photogenerated charge carriers. We employ numerical simulation and experiments to determine if this layer can be exploited to replace the transparent conductive oxide layer (TCO). We found that current collection is constant when the TCO is present, but carriers can only travel a few hundred μm when the TCO is omitted. Simulations predict that increasing the valence band offset increases the conductivity of the inversion layer.

We performed two experiments to measure lateral flow of photoexcited charge carriers near the heterointerface in silicon heterojunction (SHJ) solar cells. Using light beam methods, we probed current extraction differences between areas of varying intrinsic layer thickness and the effective cross section of junction defects. Both measurements demonstrated a strong bias voltage dependence of lateral transport and transport lengths of tens to hundreds of microns as bias approached operating voltages. Lateral carrier flow near the heterointerface is proposed as one of the reasons that SHJ solar cells are extremely sensitive to interfacial defects.

In this contribution, we shortly review the main features of amorphous/crystalline silicon heterojunction (SHJ) solar cells, including interface defects and requirements for high quality interfaces. We show how a process flow with a limited number of process steps leads to screen printed solar cells of 2x2cm(2) with 21.8% efficiency and of 10x10cm(2) with 20.9% efficiency (n-type FZ). We show that the devices work in high injection conditions of 3x10(15)cm(-3) at the maximum power point, a factor two higher than the base doping. Several research labs and companies can now produce large area 6 '' cells well over 20% on CZ wafers and some of the critical cost factors, such a metallization can be overcome with suitable strategies. Based on the high quality coating tools and processes developed for thin films used for flat panel display or thin film solar cell coatings, the deposition of the layers required to make SHJ cells has the potential to be performed in a controlled way at low cost. Considering the few process steps required, the high quality n-type Cz wafers that can be obtained by proper crystal growth control, SHJ technology has several assets that could make it become a widespread PV technology.

Silicon heterojunction solar cells are emerging photovoltaic devices that have gained particular interest for their very high open-circuit voltages. Unfortunately, the amorphous silicon layers that both passivate the crystalline silicon surfaces and act as emitter and back-surface field introduce new design constraints that often reduce the short-circuit current and fill factor compared to diffused junction solar cells. Here, we investigate the roles of the front and back transparent conductive oxide films, as well as the front amorphous silicon stack, in current generation. Decreasing the doping density of the indium tin oxide (ITO) films at the front of the cells trades optical losses for electrical losses as parasitic, long-wavelength absorption is reduced but film resistance is increased. However, high currents can be obtained while retaining respectable fill factors with proper ITO and metallization combinations. The rear ITO doping may be tuned to promote long wavelength transparency while avoiding fill factor losses due to contact resistance. The p-type amorphous silicon film that forms the emitter is found to be electrically dead in the sense that no light absorbed in this layer contributes to the current. Reducing the layer thickness to improve current generation comes at a price, however, as fill factor also falls. 2×2 cm2 screen-printed silicon heterojunction solar cells fabricated with these considerations in mind exhibit short-circuit densities above 38 mA/cm2, open-circuit voltages over 725 mV, and efficiencies as high as 20.8%.

The a-Si:H / c-Si heterostructure, is an attractive solution to avoid the presence of highly recombinative metal contacts at the surfaces of c-Si based solar cells. To assure good interface passivation, insertion of a sandwiched thin device-grade intrinsic a-Si:H(i) film is recommended between substrate and doped a-Si:H layer. In this article we discuss our findings on the impact of low-temperature post-deposition annealing on the passivation properties of such stacks: we have identified two fundamentally different recombination mechanisms that may critically affect heterostructure device performance. Firstly, for the intrinsic buffer layer, whereas abrupt a-Si:H / c-Si interfaces typically benefit from post deposition annealing, it is shown that this is not true when epitaxially grown Si material is present at the interface. Secondly, in case the buffer layer is covered with a doped a-Si:H overlayer, annealing may again be detrimental for the interface passivation. The latter is linked to the fact that the presence of such doped layer may lower the energy required for Fermi-level dependent Si-H bond rupture in the underlying intrinsic buffer layer, resulting in enhanced interface recombination.