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Using deep learning approaches, this work presents a fully automated system for diagnosing COVID-19 from volumetric chest computed tomography (CT) scans. Transfer learning technique has been used to detect and classify CT scan data into three categories: COVID-19, CAP (Community-acquired pneumonia), and normal cases. The proposed model was built on top of the pre-trained AlexNet model's architecture and was capable of performing multi-classification tasks with a promising accuracy of 98.03%. The results demonstrate that the proposed model outperforms other current models and may thus be utilized as a potential tool for COVID-19 patient diagnosis.

As we all know, due to the increase in population, there are number problems, and traffic problems are one of the main reasons for big cities. It is difficult to find an empty parking space to park the car. Most of the time is wasted looking for empty parking spaces and traffic. Sometimes, the owner of the car needs to pay for parking or can hand over the car to a security guard, where the security will park the car before handing it over to the owner. Due to parking problems, many people try to avoid driving by themselves. In order to overcome this problem, we propose a prototype that will help people find empty parking spaces, and under the command of the owner, the car will automatically drive to the parking system and park itself to the nearest parking space. All detailed information and notifications will be sent via the owner's mobile phone. The system will reduce time and help people find parking spaces easily. Advanced technologies like IoT, Google assistant, etc are used in this prototype.

Programmable Logic Controllers (PLC) are used in industry for automation. Now-a-days it is a standard practice to include safety interlocks along with logic functions in the PLC programming. The use of smart sensors also gives very fast changing inputs to the PLC. This makes the response time of PLC an important issue. The scan time of PLC depends upon two parameters viz. the length of PLC program and operating frequency of CPU. Thus, in order to improve PLC response time, it is necessary that scan time of PLC should be less. This paper suggests an IEC 61131-3 standards compatible PLC application dedicated Instruction List (IL) processor with a three-stage instruction pipeline on FPGA platform for better response time.

This paper describes three-phase three-wire Shunt active power filter using conventional three leg voltage source converter. In this paper three control strategies are compared. These strategies are Constant Instantaneous Power Theory, Generalized Fryze Current Control Theory and Synchronous Reference Frame Method. The performance analysis of Shunt Active Power Filter for Different Loads and for Different Supply (Balanced as well as Unbalanced) condition are simulated using Matlab.

The NoC Architecture plays crucial role while designing communication systems for System on Chip (SoC). The NoC architecture is improved over conventional bus, shared bus design and cross bar interconnection architecture for on chip networks. In order to improve the Quality of Service, Congestion, Throughput and latency in NoC, Hexagonal node based architecture is proposed in our previous paper[14]. The challenge in the hexagonal node based NoC architecture is to eliminate the faulty link or node failure in the SoC without impacting the communication between node and maintain same throughput, latency and quality of service by converging the NoC. In this paper, we propose the effective approach to eliminate the faulty node or Links in NoC without impacting SoC functionality.

This paper deals with the design of rectangular microstrip patch antenna for Wireless applications. In this paper a modified slotted microstrip antenna design for 2.5GHz operation is proposed. This provides improved performance in terms of lower return loss and higher gain. This is possible by inclusion of slots appropriately on the patch shape. The substrate material used in this design is Duroid5880 with permittivity 2.2 and size 47.43mm × 39.65mm × 1.6mm. ANSOFT HFSS EM simulator has been used for design and simulation of the microstrip antenna. The various antenna parameters such as frequency, VSWR, gain and directivity are analyzed to characterize the proposed antenna.

With increase in age, there are changes in skeletal structure, muscles mass, and body fat. For recognizing faces with age variations, researches have generally focused on the skeletal structure and body mass. We incorporate weight information to improve the performance of face recognition with age variation which utilizes neural network and random decision forest to encode age variation. This age invariant recognition technique is classified into two categories-Discriminative based techniques and Generative based technique. Generative models are typically more flexible than discriminative models in expressing dependencies in complex learning tasks. We have analyzed various approaches available in Discriminative and Generative based techniques. Standard face public databases such as LFW, YTF, FGNET, MORPH, WhoIsIt, Gallagher, Pubfig83, Twin days dataset are considered for analysis. From our analysis we have found that the Neural Network and random decision forest based classification technique has 28.532±1.03% accuracy for WHOISIT database in Discriminative based technique and SVM method has 92.8±.28% accuracy for Pubfig83 database.

Paper deals with the implementation of high performance digital up converter and digital down converter for software defined radio application. Digital up converters are used at the transmitter side to up convert the baseband signal to intermediate frequency signal. Digital down converters are used at receiver side to down convert intermediate frequency signal to baseband signal. DUC and DDC modules are designed using System generator Xilinx block set and generated verilog code for the same. Simulation is performed using Isim and synthesis is carried out using Xilinx ISE 13.2. Design has implemented on vertex-4 FPGA board. The power consumed in this design is 52.6mWatts and the maximum operating frequency is up to 336.1MHz and total time taken for output is 2.93ns.