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In this paper, the detection of common defects such as inclusion, delamination for curved composite materials is studied. The principle of measuring porosity is focused on introducing. The technology of trajectory planning and motion control for twin-robot system of testing various curved composite parts using ultrasonic transmission method is also discussed. An ultrasonic NDT system is developed for testing large-scaled curved composite components used in aerospace and other fields. With many advantages, it will be very significant for our nondestructive testing work.

This paper presents a comparative study of the power consumption of two methods to cancel the offset capacitance in high-resolution capacitive displacement sensors. One method is applied based on correlated-double-sampling (CDS) technique and the other method is applied using oversampling technique. The analytical comparison predicts similar power consumption, if the same resolution for the same conversion time need to be reached. Experimental results with implementations of the two methods confirmed the analytical prediction.

In precision mechatronic systems, such as wafer steppers, the position of critical mechanical components must be dynamically stabilized with sub-nanometer precision. This can be achieved by a servo loop consisting of a displacement sensor and an actuator. Compared to optical interferometers, capacitive displacement sensors offer smaller size and lower cost. However, mechanical tolerances limit their electrode spacing to about 10μm [1], while the targeted resolution is below 100pm rms . This requires a capacitance-to-digital converter (CDC) with more than 17b resolution. Furthermore, its latency must be low enough (20μs) to avoid compromising servo-loop stability. Lastly, it should be stable enough to maintain measurement accuracy during the intervals between system calibrations.

We report an integrated front-end circuit for capacitive displacement sensors, suitable for measuring small displacements, superimposed on a much larger stand-off distance between the sensing and the target electrodes. In order to cancel the effect of the resulting offset capacitance, a circuit technique called electrical zoom-in is applied in the interfacing circuit. The zoom-in front-end can achieve an input referred capacitance resolution of 28 aF (RMS) from a sensor with nominal capacitance of 10 pF with a measurement latency of only 5 us.

We report an integrated front-end circuit for capacitive displacement sensors, suitable for measuring small displacements superimposed on a much larger stand-off distance between the sensing and the target electrodes. In order to cancel the effect of the resulting offset capacitance, a circuit technique called electrical zoom-in is applied in the interfacing circuit. After removing the offset capacitance of a sensor with 10 pF nominal capacitance, the output-swing of the front-end corresponds to 100 fF of capacitance variation only, relaxing the specification of the following analog-to-digital converter (ADC) stage by a factor of 40.The zoom-in front-end can achieve an input referred capacitance resolution of 30 aF (RMS) from a nominal sensor capacitance of 10 pF, with a measurement latency of only 5 us. This result is achieved with 2.4 mW power consumption in the front-end.

This paper motivates the use of a “zoom-in” front-end stage to remove the effect of a large nominal sensor capacitance of a capacitive displacement sensor, intended for measuring small displacements. In this way, the dynamic range requirement for the following stages, namely the ADC, is greatly relaxed. The designed circuit uses correlated double sampling to cancel both amplifier's offset and the reset noise. A PCB prototype with standard off-the-shelf components is built up, to verify noise-canceling principle and evaluate the achievable capacitance resolution. An input referred capacitance resolution of 21 aF (rms) is measured, from a capacitive sensor with a nominal capacitance of 10 pF.

This paper addresses the challenges related to the design of a high-resolution, low-latency capacitive displacement sensor. An auto-alignment mechanism of the sensor head is proposed which relaxes the resolution requirement of the readout circuit. The measurement strategy that enables power-efficient low latency measurement is introduced.

The design of a CMOS temperature-to-digital converter (TDC) is presented. It operates by measuring the phase shift of an electrothermal filter (ETF), which is a function of the temperature-dependent thermal diffusivity of bulk silicon. Compared to previous work, this TDC employs an improved ETF, whose layout has been optimized to minimize the phase spread caused by lithographic inaccuracy. Furthermore, the TDCpsilas front-end consists of a gain-boosted transconductor, whose wide bandwidth minimizes electrical phase spread. The resulting current is then digitized by a phase-domain SigmaDelta modulator. The phase-subtracting node of the modulator is realized by a chopper demodulator, whose switching action, however, will give rise to a residual offset current. This is minimized by locating the demodulator at the virtual grounds of the transconductorpsilas gain boosting amplifiers. Any residual offset is then eliminated by chopping the entire front-end. Measurements on 16 samples show that the TDC has an untrimmed inaccuracy of less than plusmn0.4degC (3sigma) over the military range (-55degC to 125degC).

There is a strong relation between the size, the shape and the location of the illuminated part of a shallow-junction photodiode, and its series resistance [2, 3, 4]. This relation creates an expectation for a big variation of the response time (the time for which the photo-generated charge will be removed from the photodiode) with the illuminated spot size. This is because the time constant of the photodiode, which is one of the main factors defining the response time, is a product of the series resistance multiplied by the junction capacitance. In this work the dependence of the charge removal time of a shallow photodiode on the size of the illuminated area, is studied. Simulation results, as well as measurement data, show that the response time is changing only slightly with the position and the size of the illuminated spot size, when very short light pulses are used. After the incidence light is over, the discharging of the photodiode continues with a time constant, which is highly independent of the size and the location of the illuminated part of the photodiode.

In this paper, an analytical model of an electrothermal filter (ETF) is described. It is based on thermal impedance theory and employs several simplifying assumptions to model an ETF implemented in CMOS technology. A CMOS ETF's phase-shift has a well-defined temperature dependence, and can be utilized to build temperature-to-frequency converters (TFC). However, the resolution of such converters is limited by the ETF's SNR. The analytical model was used to design an optimized ETF with increased SNR in a standard 0.7-mum CMOS process. Compared to a previous design, a TFC employing this new ETF achieved 30% less output frequency jitter.