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We demonstrate that the shorter channel self-aligned top-gate (SA TG) coplanar indiumgallium- zinc oxide (IGZO) thin-film transistors (TFTs), with negative voltage applied to the back-gate, exhibit superior characteristics as driving transistors in organic light-emitting diode (OLED) pixels compared to their longer channel counterparts. The shorter channel IGZO TFTs (with a channel length (L) of 3 μm) biased with a back gate voltage of −3.5 V showed a larger subthreshold swing (SS = 0.21 V/dec) than the longer channel ones (with L = 5 μm, SS = 0.16 V/dec) with a similar threshold value (VTH = 0.7–0.8 V). A large SS is beneficial for controlling grayscale levels, especially at low gray levels, when IGZO TFTs are used as driving transistors in OLED pixels. Furthermore, the negatively back-gate-biased shorter channel SA TG coplanar IGZO TFTs exhibited significantly enhanced electrical stability compared to the longer channel ones under both positive gate bias and hot carrier stresses. The findings of this study are expected to be useful in expanding the utility of IGZO TFTs in OLED displays.

In this letter, we propose a mobility-extraction method using the frequency-independent capacitances extracted from the multifrequency capacitance-voltage method in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). This method does not use the long-channel metal-oxide-semiconductor field-effect transistor (MOSFET) current-voltage ( I-V) model and can include the effect of subgap states on the calculation of the mobility. Considering that the I-V characteristics of the disordered semiconductor transistor do not exactly follow those of the long-channel MOSFET model and the subgap states significantly affect the electrical behavior of the disordered semiconductor transistors, the proposed method is expected to be useful in the extraction of the exact values of the mobilities in disordered semiconductor transistors including a-IGZO TFTs. [ABSTRACT FROM PUBLISHER]

The mobility-degradation factor and the series resistance of cylindrical gate-all-around silicon nanowire field-effect transistors are extracted using the same mobility-degradation model as in the case of planar MOSFETs. The extraction is done by defining an asymptotic voltage as a function of the saturation current measured from devices with various lengths. The extracted mobility-degradation factor is an order of magnitude larger than those of other planar MOSFETs. This result suggests that, while the all-around gate can turn off the electron channel effectively, it creates more interface scattering in the strong inversion condition. The extracted series resistance is mostly due to the crowding of the electron flow along the sidewall of the n+ contact region making an abrupt joint with the nanowire. [ABSTRACT FROM AUTHOR]