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Network-on-Chip (NoC) has been a viable solution for resolving the complexities associated with inter-processor communications in a Chip Multi Processor (CMP). NoC accounts for a significant portion of the total power consumed by a CMP. In a standard NoC system, only a fraction of power dissipation occurs due to static/leakage, while the rest is due to dynamic power. Dynamic dissipation includes self-switching and coupling switching dissipations, with the latter accounting for a significant part of total power dissipated. Several coding methods exist to minimize this dynamic power dissipation in NoC links. In this paper, we propose Algorithm 1 to reduce self-switching transitions and Algorithm 2 & 3 to lower coupling switching transitions in between the serial links, with Encoder/decoder modules placed at Network-Interface(NI) level. Simulations done on Xilinx Vivado design suite showed a maximum reduction of 64% in coupling switching activity compared to existing schemes.

Package antennas designed at lower GHz frequencies and aperture coupled to on-chip antennas help to provide fully integrated System-in-Package transmitters with high gain, efficiency and lower power consumption. In this paper, a superstrate H-antenna with H-shaped ground plane is used as a package antenna which provides high gain and miniaturization. The package antenna is aperture coupled to a two-turn on-chip loop antenna, which is conjugately matched to a differential Class-E power amplifier (PA) with current reuse. The PA, along with the antenna system, helps to increase the communication range of transmitter. PA and on-chip antenna are designed in UMC 180nm technology, while the package antenna is designed in Low Temperature Co-fired Ceramic (LTCC) package. From the post-layout simulations performed in Cadence virtuoso, the PA has a maximum output and power added efficiency (PAE) of 19 dBm and 50%. H-antenna and loop antenna are simulated in Advanced Design System (ADS). From the simulations, the on-chip loop antenna has a gain and efficiency of −20.5 dBi and 0.42%. The aperture coupled H-antenna has a gain and efficiency of −1.6 dBi and 17.2%. The proposed design has higher gain and smaller size compared to the design proposed in literature, hence can be used for long range wireless applications.

Artificial intelligence an integral part of a neural network is based on mathematical equations and artificial neurons. The focus here is to implement 3 bit pattern recognition using CNTFET model in 32nm technology. Its analysis with bulk CMOS technology shows CNTFET based design has better performance in terms of power dissipation, delay and power delay product. This paper aims at analyzing neural network method in pattern recognition. HSPICE level 49 simulations of inverter, current mirror and current mode hamming neural network (HNN) for 3 bit pattern recognition is done. The transient and DC simulation of 3 bit pattern recognition circuit using nano_model_39 CNFET library shows power dissipation same but propagation delays is reduced by 40%. Hence power delay product is improved 100 times using CNTFET.

Computer vision can be used as an integral part of any autonomous systems. Visual input and processing enables faster and early decisions. An important challenge in computer vision is detection and recognition of objects. This challenge is more pronounced in low illumination. In this paper, we are proposing a detection and recognition model for road warning signs with voice notification system for both autonomous and usual vehicles considering varied level of illumination. Realtime video from the vehicles was analysed using opencv. The noise from the video was removed using filters. Detection was based on Haar-cascades and training was done with sample positive and negative images. Text recognition was based on pattern matching. Voice notification was done using string to voice converters. The night vision was lightened considering the glare of vehicles headlight.

Personalized recommendation systems are widely used with the development of electronic commerce. Recommender systems provide the users a list of recommendations they might prefer or supply predictions, on how much the user might prefer each item. The environment we use for recommending the books with high ratings is Mahout, and for massive storage we go for BigData analysis. This provides a recommendation system by analyzing engrossment of the user and features of the books. With the gradual increase of the customer and product, the traditional collaborative filtering suffers accuracy, sparsity, scalability and cold start problem. In suchcircumstances, where new items are added and are rated only by few users, here a cold start issue arises. To solve these problems, we propose a recommendation system in mahout, where the items without enough ratings will be compared with the users preference list to recommend the books to the users. By combining content and collaborative filtering techniques, we reduce the cold start problems upto some extent. Thus we recommend books with high ratings, based on the preferences of the users.

Winner Take all circuits are widely used in hardware implementation of pattern recognition systems based on Hamming Neural Network. WTA is a kind of competitive network which takes voltage or current as its input. The WTA function is to accept input signals from outer world, compare all the received inputs, largest intensity signal is accepted by WTA and assign a high digital value to corresponding cell storing largest intensity input and rest are assigned logic low value to the corresponding cell that stores smaller intensity input signals. Based on the type of input, WTA are classified into two types: current mode and voltage mode WTA. The circuit is simulated using 180nm CMOS Technology. These circuits are later used in hardware implementation of Hamming neural network(HNN) for number recognition.

In recent days, web searching and security of the archives plays most incredible progress. The enduring research prototypes many web search show the result by searching the relevant data alone. Due to the mere relevancy search, the users may loss some useful data which are not included in the search result. Moreover, it also may consume more time by searching the data sequentially. To overcome these challenges stemming process is united with the existing model for searching the both labelled and unlabelled documents. Furthermore, User Based Advertisement (UBA) is included with the proposed search engine to display the advertisements based on search. To improve the ranking system, Time Stamp Based Analysis (TSBA) is incorporated in the process for easy search of users. With these improvements during the search process in keyword search and posting the comments in the link any offensive words are used it will give the alert to remove the word. While downloading one's file that are uploaded in the web search become quite easy. But security is a major concern sending a request for downloading a data. In order to overcome this difficulty, Email OTP Alert (EOTPA) is provided in the proposed model to increase the security in web search.

The growing demand has lead to increased use of renewable energy resources. Among all renewable energy resources, the photovoltaic(PV)power generation acts as a green source. This paper proposes the implementation of Improved Positive Output Super-Lift Luo converter (IPOSLC) with the solar panel. IPOSLC is a type of DC-DC converter in which the positive output voltage increases in geometric progression. In Positive Output Super-lift Luo Converter, the output is increased three times the input. But in Improved Positive Output Super-Lift Luo converter, the output is increased six times of the input which is specified by adding an inductor and diode. To track the maximum power from the PV cell, P&O method is employed. In this method, the duty cycle is calculated with the sensing of the panel voltage and current and the corresponding power values of it. This system is modelled and simulated using MATLAB/Simulink and validated with the theoretical calculations.

This paper presents VLSI implementation of handwritten digit recognition system based on analog neural network. The recognition system is based on the least hamming distance neural network which both learning and classification. The circuit is simulated using SPICE tool at 180nm CMOS technology. The proposed circuit is modified version of existing circuit where initially first winner output voltage is set to logic one and rest all to logic zero and also determines next subsequent winner having minimum hamming distance. This type of circuit can be utilized by visual tracking system providing them ability to have backup recognition utility in case first recognized pattern proves to be incorrect. This design shows low power consumption of 34mW.

A patent is an intellectual property document that protects new inventions. It covers how things work, what they do, how they do it, what they are made of and how they are made. The owner of the granted patent application has the ability to take a legal action to stop others from making, using, importing or selling the invention without permission. While applying for a patent, the inventor has issues in identifying similar patents. Citations of related patents, which are referred to as the prior art, should be included while applying for a patent. We propose a system to develop a Patent Search Engine to identify related patents. We also propose a system to predict Business Trends by analyzing the patents. In our proposed system, we carry out a query independent clustering of patent documents to generate topic clusters using LDA. From these clusters, we retrieve query specific patents based on relevance thereby maximizing the query likelihood. Ranking is based on relevancy and recency which can be performed using BM25F algorithm. We analyze the Topic-Company trends and forecast the future of the technology which is based on the Time Series Algorithm - ARIMA. We evaluate the proposed methods on USPTO patent database. The experimental results show that the proposed techniques perform well as compared to the corresponding baseline methods.

Speech is an important means of communication. Gender is the most significant characteristic of speech. Pitch is commonly used feature for gender classification as it differs in male and female voice. But this method is not applicable in cases where pitch of male and female is almost the same. In this paper the above limitations are rectified by extracting other features like Mel Frequency Cepstral Coefficient (MFCC), energy entropy and frame energy estimation from real time male and female voices. The gender classification is done by using Artificial Neural Network (ANN) and Support Vector Machines (SVM). The features extracted from the same word spoken by male and female are compared and classified. Likewise, speaker saying different words are related and gender is categorized indicating that the features considered are content independent. The experimental results show that SVM classification performed better than ANN in the gender identification of speech using the same features.

Cloud computing is the new business paradigm introduced in the IT market in the current decade providing the customers with the option to pay for the amount of service utilized. The use of cloud computing has increased rapidly in many organizations. Ensuring security of data in a cloud is a major factor in the cloud computing environment, as users often store fragile information in cloud storage. Public auditing on shared data stored in the cloud is done by exploiting Aggregate Signature Scheme. With this mechanism, the identity of the signer of various blocks of shared data is kept private from public verifiers, who are able to verify efficiently the integrity of shared data without retrieving the entire file. However traceability is a major issue. A Multi-clouds Database Model (MCDB) which is based on Multi-clouds service providers instead of using single cloud service provider such as in Amazon cloud service is used to implement traceability. Also, dealing with single cloud providers is predicted to become less popular with customers due to risks of service availability failure and the possibility of malicious insiders in the single cloud. A movement towards multi-clouds is highly efficient and this system would also check for the data's which are attacked by malicious users, with short time and cost requirement.

In this paper, a standalone wind energy conversion system along with switched inductor quasi impedance source inverter is proposed. Wind energy system is chosen because of its sustainability and commercial potential. Permanent magnet synchronous generator is used as there is no need of separate excitation and maintenance. Also Optimum Power technique is incorporated to improve MPPT of wind energy conversion system (WECS).The main objective of this paper is to improve the wind energy conversion system by implementing switched inductor quasi-z-source inverter and battery energy system. Switched inductor quasi-z-source inverter has high efficiency and the input current is continuous, suppresses inrush current and avoids shoot through fault in inverter when compared to Z-source inverter based wind energy conversion system. An effective control technique for the inverter, based on the pulse width modulation (PWM) method, has been developed namely Simple Boost Modulation technique to balance the line voltages. The proper control of battery current through converter has been done to reduce the electrical torque pulsation of the PMSG under an unbalanced load condition.

Wireless sensor networks are emerging as broadband communication networks, because of their bandwidth, low cost and easy installation. In large sensor networks, data aggregation significantly reduces the amount of communication and energy consumption in the network. In this paper two different routing protocols namely Ad hoc On-demand Distance Vector (AODV) routing protocol and Secure-aware Ad hoc Routing Protocol (SAR) are proposed. By using these protocols the network performances are evaluated in the presence of three types of attacks namely black hole attack, warm hole attack and grey hole attack respectively. The performance of the network is analyzed using the Network Simulator.

In a multi-gigawatt pulsed power system like KALI-30 GW, insulation coordination is required to achieve high voltages ranging from 0.3 MV to 1 MV. At the same time optimisation of the insulation parameters is required to minimize the inductance of the system, so that nanoseconds output can be achieved. The KALI-30GW pulse power system utilizes a combination of Perspex, delrin, epoxy, transformer oil, nitrogen/SF 6 gas and vacuum insulation at its various stages in compressing DC high voltage to a nanoseconds pulse. This paper describes the operation and performance of the system from 400kV to 1030 kV output voltage pulse and insulation parameters utilized for obtaining peak 1 MV output.

This paper deals with the design of a solid state pulse generator based on the Marx concept. IGBT switches have been considered for the purpose of pulse generation across a resistive load. The proposed pulse generator is to be used for Electron gun application. Output specifications of the voltage pulse are peak output voltage 50 kV, peak output current 50 A, repetition frequency 10 Hz and maximum pulse width 5 μs. The design was verified with simulation in Proteus software.

In applications such as Digital Signal Processing architecture, microprocessor and microcontroller, full adder circuit plays an important role. Performance criteria for the logic styles are circuit speed, area and power dissipation. The major goal that requires ultimate attention is power consumption. Hence adders are designed in such a way to reduce the propagation delay which is also a cause for power consumption. Here two new designs adopted for low power and high speed ripple carry adder featuring Gate Diffusion Input (GDI) structure and Hybrid CMOS logic style. The hybrid logic style is employed in order to achieve a wide range of applications. The Gate-Diffusion-Input Multiplexer full adder (GDI-MUX) design eliminates the need of XOR/XNOR gates for designing full adder cell. The performance parameters such as area, delay, power and Power-Delay-Product (PDP) were analyzed using SPICE.

There are certain aspects in the field of networking that needs to be accomplished, yet it is very difficult to achieve. One such concept is Optimization. Achieving a high degree of reliability will eventually lead us to Optimization. But, achieving high degree of reliability?? This indeed is a very big problem that needs a solution. There have been many solutions before that solves the problem in some cases, yet there is nothing so called a global technique available that can be applied to any networks. The next big problem is guaranteeing Quality of Service (QOS). Our paper basically aims at providing a method or an approach which will give us a solution for both of these problems depicted above. The approach we are going to adopt is something related to effective utilization of the routing algorithms available. When one algorithm gives some efficiency criteria, then what will happen to the efficiency if some algorithms are combined? This basic fascination led us to use 3 known Routing algorithms namely Link state, Floyd war shall and Ant colony. These algorithms are applied in phases or stages to get some effective optimization result. This effective optimization will naturally lead us to a stage where we could easily guarantee QOS too. The state conditions that will possibly decrease the reliability criteria here can be easily overcome than in other cases where a single routing algorithm is used.