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Paper-based digital microfluidic biochips (PDMFBs) are becoming highly effective among the microfluidic platforms due to its low-cost and in-place fabrication. The designed electrodes and wiring can be fabricated on a piece of paper by an inkjet printer and conductive ink containing carbon nanotube particles (CNTs). However, due to induced control interference, the wires cannot pass by an arbitrary electrode. Each wire that is to be routed possesses its conflict electrode group, which must be avoided for a feasible droplet movement. This paper presents a fluid-control co-design considering several important cost-driving issues like minimization of schedule length, control pin count, and wirelength, together with congestion-free and conflict-free wiring. Observably, design gaps exist among the sub-tasks of the fluid-level, control-level, and fluid-control as a whole, due to their separate considerations. It indeed introduces many design cycles lengthening the design process, and thus increases the overall cost. In this context, this work integrates the sub-tasks as a prior need to obtain a low cost and efficient platform. Several benchmarks have been studied to evaluate the performance.

Flow-based microfluidic biochips have emerged as a potential lab-on-chip platform for numerous biochemistry operations. Among various flow-based biochips, Programmable Microfluidic Devices (PMDs) receive much attention due to its capability of performing functionalities on a single platform with no hardware modifications. High precision control and production of correct outcomes are the urgent needs in the PMDs. While sharing the micro-channels, a fluid-flow may be contaminated by the residues stuck on the channel. Washing of the microchannels with buffer fluid is an immediate solution for safe execution of biochemistry. However, each wash fluid has a finite washing capacity and can wash only a limited number of contaminated spots. In this paper, we propose a wash optimization model that aims to remove all the contaminations while minimizing washing time and total capacity wastage. The effectiveness of the proposed approach has been evaluated considering a number of baseline methods and the previous works.

Droplet-based Digital Microfluidic Biochips (or DMFBs) are now being the prime platform for a number of point of care diagnostics, clinical studies, and sample preparations. Several design optimization methods exist at the fluid-level that automate the tasks of a DMFB. However, in high frequency applications, its performance heavily deteriorates in the order of degrading electrodes producing incorrect outcomes. Vague results may also be generated if cross contamination during droplet routing is not avoided. We define a DMFB to be safe if it is capable of handling reliability and also free from cross contamination. Alongside, as the fluid-level of DMFBs comprises several tasks that altogether introduces design cycles and leads to higher cost, a low-cost platform is urgently required. This paper proposes a fluid-level design for DMFBs that considers the above facts together. A graph model has been used to tackle them. An exact algorithm is presented. The obtained results are validated with several benchmarks.

Microfluidic biochip is a lab-on-a-chip system that replaces conventional laboratory experiments. Digital Microfluidic Biochip (DMFB) handles liquids as discrete droplets, and offers highly reconfigurable and scalable technology. DMFB combines electronics with biology opening the new application areas of Microelectronics, Biochemistry, and Biomedical sciences. A new application area of DMFB using equilateral triangular electrodes instead of square electrodes has been proposed, considering the design issues and the fluidic constraints while performing all the modular operations. The improvement of sample-reagent mixing procedure is a key challenge issue in bioassay implementation as mixing is the most dominating operation in DMFB; hence, the Triangular DMFB (TEDMB) system leads over the existing DMFB system. In this paper, we have presented a study of TEDMB mixers and developed mixing library for TEDMB synthesis.

Here, we have proposed a statistical framework based on a novel bat algorithm inspired particle swarm optimisation algorithm for the reconstruction of gene regulatory networks from temporal gene expression data. The recurrent neural network formalism has been implemented to extract the underlying dynamics from time series microarray datasets accurately. The proposed swarm intelligence framework has been used for optimising the parameters of the recurrent neural network model. Preliminary research with the proposed methodology has been done on a small, artificial network and the experimental (in vivo) microarray data of the SOS DNA repair network of Escherichia coli. Results obtained suggest that the proposed methodology can infer the underlying network structures with a better degree of success.

These days, in emergency, multiple assay operations are required to be performed at parallel. Area of a given chip as a constraint, how efficiently we can use the chip and how much parallelism can be built-in are the objectives of this paper. A typical application of an assay may characterize a sample where, say only one type of reagent and multiple samples have been considered, or vice versa, and identify some factor(s) of the sample(s) under requirement in parallel. A generalized application may also consider more samples and more reagents for respective findings at parallel. In our experimentation, we effectively do this task in parallel for five such sets of sub regions of a given restricted sized chip in Digital microfluidics using an array based partitioning pin assignment technique, where cross contamination problem has also been considered, and efficiency of proper taxonomy of a given sample has also been improved.

The guard zone G (of width r) of a simple polygon P is a closed region consisting of a set of straight line segments and circular arcs (of radius r) bounding the said polygon such that there exists no pair of points p (on the boundary of P) and q (on the boundary of G) having their Euclidean distance d(p, q) less than the specified value r. In this paper we have designed a cost-optimal (parallel) algorithm to solve the guard zone computation problem for solving it in distributed environment that finds application in resizing of VLSI circuits.

Counterfeit coin problem has been considered for a very long time and is a topic of great significance in Mathematics as well as in Computer Science. In this problem, out of« given coins, two or more false coins (the coins are classified as false because their weights are different when compared to a standard coin) are present which have the same appearance as the other coins. This problem belongs to the class of combinatorial group testing problem which finds several applications in hidden graph construction problem etc. In this paper, we have constructed an optimal algorithm to determine two false coins out of a given number of coins. In addition, our objective is to solve the problem in minimum number of comparisons with the help of an equal arm balance. Our proposed algorithm is able to find out the fake coins using O(log n) comparisons.

The guard zone computation problem is of utmost importance in the domain of VLSI physical design automation as one of the major purposes is to find an optimized way to place a set of two-dimensional blocks on a chip floor. Beyond this, it has huge significance in the field of robotic motion planning, Geographical information system, automatic monitoring of metal cutting tools and design of any embedded systems. In VLSI layout design, the circuit components (or the functional units / modules or groups / blocks of different sub-circuits) that may be viewed as a set of polygonal regions on a two-dimensional plane, are not supposed to be placed much closer to each other in order to avoid electrical (parasitic) effects among them. Each (group of) circuit component(s) C i is associated with a parameter δ i such that a minimum clearance zone of width δ i is to be maintained around C i . If the guard zonal regions overlap, we have to remove the overlapped regions in order to compute the resultant outer guard zone (sometimes inner guard zones are also an issue to be considered). The location of guard zone (of specified width) for a simple polygon is a very important problem for resizing a (group of) circuit component. In this paper, we have developed an algorithm to compute the guard zone of a simple polygon as well as to exclude the overlapped regions among the guard zonal segments (if any) in O(nlogn) time, where « is the number of vertices of the given simple polygon.

Digital Microfluidic Biochip (DMFB) is a ground-breaking invention in many areas of Microelectronics, Biochemistry, and Biomedical sciences. It is also known as ‘Lab-on-a-Chip’ for its performance as an alternative for laboratory experiments. Various types of diagnosis procedures are performed on it through a sequence of modular operations like sample preparation, mixing, and detection. Mixing is the most important operation of DMFB as the outcome of the experiment is almost dominated by mixing. A good mixing of corresponding sample and reagent gives proper result while an improper mixing leads to erroneous result, which may be the reason to discard the assay. So, our objective is the betterment of mixing operation. In this paper, we have proposed a design using equilateral triangular electrodes instead of square electrodes, maintaining all the constraints required to ensure safe droplet movement and other modular operations, while improvement of the mixing operation is the key design issue.

The guard zone computation problem finds immense applications in the field of VLSI physical design automation and design of embedded systems, where one of the major purposes is to find an optimized way to place a set of two-dimensional blocks on a chip floor. In VLSI layout design, the circuit components (or the functional units / modules or groups / blocks of different sub-circuits) that may be viewed as a set of polygonal regions on a two-dimensional plane, are not supposed to be placed much closer to each other in order to avoid electrical (parasitic) effects among them [12]. Each (group of) circuit component(s) C i is associated with a parameter δ i such that a minimum clearance zone of width δ i is to be maintained around C i . If the guard zonal regions overlap, we have to remove the overlapped regions in order to compute the resultant outer guard zone (sometimes inner guard zones are also an issue to be considered). The location of the guard zone (of specified width) for a simple polygon is a very important problem for resizing the (group of) circuit components. In this paper, we have developed an algorithm to compute the guard zone of a simple polygon as well as to exclude the overlapped regions among the guard zonal segments (if any) in O(n log n) time, where n is the number of vertices of the given simple polygon.

The counterfeit coin problem is well-known and truly interesting in Computer Science, Game theory, and also in Mathematics. In this problem the objective is to detect the fake coin(s) of identical appearance but different weight in minimum number of comparisons. The word counterfeit most frequently describes forgeries of currency or documents, but can also describe software, pharmaceuticals, clothing, and more recently, motorcycles and cars, especially when these result in patent or trademark infringement. Finding one fake coin among n coins is tricky enough and complex. The problem becomes rigorous when there are two fake coins, as the false coin pair may form several different combinations that make the problem particularly tricky and complex to solve. In this paper we have developed a new algorithm for solving two versions of the two counterfeit coins problem in O(log n) time, where n is the number of coins given.

Counterfeit coin problem is of utmost importance and it is truly interesting in Computer Science and Game theory as well as in Mathematics. In this problem the objective is to detect the fake coin(s) of identical appearance but of different weight in minimum number of comparisons. The word counterfeit is most frequently applicable to forgeries of currency or documents, but can also describe software, pharmaceuticals, clothing, and more recently, motorcycles and other vehicles, especially when these result in patent or trademark infringement. In this paper we have developed a new algorithm for solving two counterfeit coins problem in linear time, where n is the total number of coins given. However, this is the first algorithm that identifies and solves the problem, given the false coins with type ω(ΔH) = ω(ΔL), i.e., one false coin is heavier and another is lighter than a true coin, and their difference in weight from the true coin is equal. However, this is the degenerate case in the field of two counterfeit coins problem.

Digital Microfluidic Biochips (DMFB) is revolutionizing many areas of Microelectronics, Biochemistry, and Biomedical sciences. It is also known as 'Lab-on-a-Chip' for its popularity as an alternative for laboratory experiments. Pin count reduction and cross contamination avoidance are some of the core design issues for practical applications. Nowadays, due to emergency and cost effectiveness, more than one assay operations are required to be performed simultaneously. So, parallelism is a necessity in DMFB. Having an area of a given chip as a constraint, how efficiently we can use a restricted sized biochip and how much parallelism can be incorporated are the objectives of this paper. The paper presents a design automation flow that augments parallelism in applications considering cross contamination problem as well.

Digital Microfluidic Biochips (DMFB) is modernizing many areas of Microelectronics, Biochemistry, and Biomedical sciences. As an alternative for laboratory experiments it is popularly also known as `Lab-on-a-Chip'. Reduction in pin count and avoiding cross contamination are some of the important design issues for realistic relevance. These days, due to urgent situation and cost efficacy, more than one assay operations are essential to be carried out at the same time. So, parallelism is inevitable in DMFB. Having an area of a given chip as a constraint, how efficiently we can use a limited sized chip and how much parallelism can be incorporated are the objectives of this paper. The paper presents a design automation flow that enhances parallelism by adopting Connect-5 structure of pin configuration and considering cross contamination problem as well. The algorithm developed in this paper assumes array based partitioning of modules as pin constrained design technique, where a constant number of pins has been used for desired scheduling of reagent and sample droplets. To avoid cross contamination and at the same time to minimize the delay required for washing, wash droplet scheduling and proper placement of modules to minimize wash operations are also taken care of.