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The TDCpix is a novel readout ASIC for hybrid pixel detectors with emphasis on timing. It is designed to meet the requirements of the Gigatracker, the kaon spectrometer of the NA62 experiment at the CERN Super Proton Synchrotron. The Gigatracker consists of three tracking and time-tagging hybrid pixel modules. A time resolution better than 200 ps is required. The silicon pixel sensors will be 60×27 mm2 and 200 µm thick. A pixel size of 300×300 µm2 will provide the required position and momentum resolution. Each sensor will be read out by 2×5 TDCpix ASICs, connected by flip-chip bonding. The main capabilities of the TDCpix chip will be to detect and time stamp more than 130 million charged particle hits per second (>0.8 MHz/mm2) with a timing resolution below 200 ps (RMS). This contribution describes the completed and final design of the TDCpix ASIC. The chip has been designed in a 130 nm CMOS process. It combines a matrix of 45×40 pixel channels with amplifying and discriminating circuits and a complex peripheral region including an array of TDCs based on DLLs, four high speed (3.2 Gb/s) data serializers, a low-jitter PLL, bandgap references, DACs, readout and control circuits. Mandatory correction of the time-walk of the discriminator leading edge is based on the measurement of Time over Threshold. The laboratory characterization of a prototype chip demonstrated a resolution better than 75 ps RMS for injected charges larger than 2 fC and constant pulse shapes. The achievement of the target timing resolution with real particles has been demonstrated in beam tests using prototype chips and prototype hybrid modules.

The detection of cancer in its early stage is known to be of key importance to improve cancer treatment and thus reduces mortality and cost. As a consequence, this has led to a growing interest in developing high performance multimodal imaging devices capable of detecting smallest possible tumors. As part of this approach, the EndoTOFPET-US project, a European FP7 program, aims to develop new biomarkers for the pancreatic and prostatic cancers. Testing such markers requires improving the detection of smaller tumors and performing biopsies based on combined anatomic and functional image information. The detection of small tumors using PET detectors also entails high sensitivity and high spatial resolution. One particular objective of this project is to develop a prototype of a novel bi-modal, TOFPET and ultrasound, endoscope for the detection of early stage pancreatic or prostatic tumors. It consists of two separate PET detectors, one a 23×23cm2 total area external plate (placed outside the body) with 256 arrays of 4×4 LYSO crystals of 3.1×3.1×15mm3 size coupled to Hamamatsu MPPC monolithic arrays of 3×3mm2 single sensors, and an internal (endoscopic) PET probe that consists of an array of 9×18 LYSO fibers with a size of 0.71×0.71×10mm3 coupled to a fully digital SiPM [1,2]. This PET tip is attached to a conventional ultrasound endoscope. Electronic 'collimation' provided by time of flight measurements between the external PET plate and the internal PET probe allows the necessary sensitivity to efficiently reject background. This, however, requires a coincidence time resolution of 200ps FWHM. High spatial resolution of ≤ 1mm can be achieved due to the very high granularity of the endoscopic PET probe consisting of crystal pixel sizes of less than 800μm2 section. In this paper we present the design and current development of the PET modules for the endoscopic probe as well as their performance in terms of light yield (LY) and coincidence time resolution (CTR) made with different prototypes. © 2012 IEEE.

The renewal of interest for Time of Flight Positron Emission Tomography (TOF PET) has highlighted the need for increasing the light output of scintillating crystals and in particular for improving the light extraction from materials with a high index of refraction. One possible solution to overcome the problem of total internal reflection and light losses resulting from multiple bouncing within the crystal is to improve the light extraction efficiency at the crystal/photodetector interface by means of photonic crystals, i.e. media with a periodic modulation of the dielectric constant at the wavelength scale. After a short reminder of the underlying principles this contribution proposes to present the very encouraging results we have recently obtained on LYSO pixels and the perspectives on other crystals such as BGO, LuYAP and LuAG. These results confirm the impressive predictions from our previously published Monte Carlo simulations. A detailed description of the sample preparation procedure is given as well as the methodology and different characterization steps to control the process and evaluate the results. Pictures and quantitative results are shown, which confirm that significant light output gain factors (50% and more) can be obtained with this approach. Finally an interesting feature of photonic crystals to collimate light in some privileged directions is highlighted.

The paper presents test results of a front-end ASIC developed for fast timing applications with silicon pixel detectors. Implemented in a 0.13 μm CMOS process, the prototype integrates 107 read-out cells. In an area of 300 μm × 300 μm each cell incorporates a fast transimpedance amplifier with 3 ns peaking time, a Constant Fraction Discriminator (CFD) and a Time to Digital Converter (TDC). The analog front-end is optimized for signals from 1 fC to 10 fC and dissipates lmW from a 1.2 V supply. Electrical tests of the key building blocks and system level aspects are discussed in the paper.

We present the first commissioning data of our TOF-PET test device featuring MPPC read-out of small size LFS crystals. We discuss the characteristics of the test device and present results from two different multi-channel read-out ASIC chips which offer a high timing performance.

The paper describes the design of a front-end chip for hybrid pixel detectors optimized for good timing resolution (200 ps rms) and high event rate (150 kHz per pixel). Each channel consists of a fast transimpedance amplifier with 5 ns peaking time, a constant fraction discriminator (CFD), and a Time-to-Digital Converter (TDC). In order to cope with the rate requirement, a multi-event buffering scheme employing both analog and digital pipelines is implemented in each cell. This development is part of the R&D activity for the silicon tracker of the NA62 experiment at CERN. The architecture of the chip and the design of the critical building blocks are discussed in the paper.

The renewal of interest in Time of Flight Positron Emission Tomography (TOF-PET), as well as the necessity to precisely tag events in high energy physics (HEP) experiments at future colliders are pushing for an optimization of all factors affecting the time resolution of the whole acquisition chain comprising the crystal, the photo detector, and the electronics. The time resolution of a scintillator-based detection system is determined by the rate of photo electrons at the detection threshold, which depends on the time distribution of photons being converted in the photo detector. The possibility to achieve time resolution of about 100 ps Full Width at Half Maximum (FWHM) requires an optimization of the light production in the scintillator, the light transport and its transfer from the scintillator to the photo detector. In order to maximize the light yield, and in particular the density of photons in the first nanosecond, while minimizing the rise time and decay time, particular attention must be paid to the energy transfer mechanisms to the activator as well as to the energy transition type at the activator ion. Alternatively other light emission mechanisms can be considered. We show that particularly Cerenkov emission can be used for this purpose. Special emphasis was put on the light transport within the crystal and at its interface with the photo detector. Since light is produced isotropically in the scintillator the detector geometry must be optimized to decrease the optical path-length to the photo detector. Moreover light bouncing within the scintillator, affecting about 70\% of the photons generated in currently used crystals, must be reduced as much as possible. We also investigate photonics crystals that are specifically designed to favor specific light propagation modes at the limit of total reflection inside and outside of the crystal and how they might increase the light transfer efficiency to the photo detector and hence improve time resolution. Examples for the production and deposition of photonics crystals as layers on Lutetium Yttrium Ortho-Silicate (LYSO) and Lutetium Yttrium Aluminum Perovskite (LuYAP) crystals are shown here, as well as first results on an improved light extraction resulting from this method.

We present the design and test results of a front-end prototype circuit developed in 130 nm CMOS technology for the readout of the Gigatracker pixel detector experiment in NA62 at CERN. The main challenges for the front end amplifier are very high signal hit rate (dead time less than 100ns, average signal rate 100 kHz) and 100 ps timing resolution combined with the level of affordable power consumption (< 2W/cm2) and noise (< 200 e−ENC). The predicted ENC levels for the nominal detector capacitance of 250 fF and maximum leakage current of the order of 20 nA are below 200 e−. The overall power consumed by the analogue and digital part of the pixel cell is in the order of 130 μW. The optimization of the design as well as test results of the prototype front end chip are evaluated and discussed.

Low-power amplifier-discriminators based on a so-called NINO architecture have been developed with high time resolution for the readout of radiation detectors. Two different circuits were integrated in the NINO13 chip, processed in IBM 130 nm CMOS technology. The LCO version (Low Capacitance and consumption Optimization) was designed for potential use as front-end electronics in the Gigatracker of the NA62 experiment at CERN. It was developed as pixel readout for solid-state pixel detectors to permit minimum ionizing particle detection with less than 180 ps rms resolution per pixel on the output pulse, for power consumption below 300 mu W per pixel. The HCO version (High Capacitance Optimization) was designed with 4 mW power consumption per channel to provide timing resolution below 20 ps rms on the output pulse, for charges above 10 fC. Results presented show the potential of the LCO and HCO circuits for the precise timing readout of solid-state detectors, vacuum tubes or gas detectors, for applications in high energy physics, biotechnologies or medical imaging.

Future high-energy physics experiments entail the need to improve the existing detection technologies, as well as develop new ones. Larger luminosities of the new accelerators require greater granularity of tracking detectors, which will be exposed to much higher doses of radiation. One of the newly-investigated solutions for tracking detectors is the Thin Film on ASIC (TFA) technology, which allows combining advantages of Monolithic Active Pixel and Hybrid Pixel technologies. In the paper we present noise analysis of a front-end circuit for readout of a TFA sensor. The circuit is based on a charge sensitive preamplifier built around an un-buffered cascode stage with active reset circuit. The feedback capacitance is reset through a transistor biased with a constant current instead of a voltage controlled reset transistor in order to limit parasitic charge injection into a very small feedback capacitance. Detailed analysis of noise in the reset and the readout phase and design optimization based on the Enz-Krummenacher-Vittoz (EKV) transistor models as well as test results of prototypes are presented.

In the framework of the European FP6's BioCare project [1], we develop a novel, time-based, photo-detector read-out technique to increase sensitivity and timing precision for molecular imaging in PET and CT. The project aims to employ Avalanche Photo Diode (APD) arrays with state of the art, high speed, front end amplifiers and discrimination circuits developed for the Large Hadron Collider (LHC) physics program at CERN, suitable to detect and process photons in a combined one-unit PET/CT detection head. In the so-called time-based approach our efforts focus on the system's timing performance with sub-nanosecond time-jitter and -walk, and yet also provide information on photon energy without resorting to analog to digital conversion. The bandwidth of the electronic circuitry is compatible with the scintillator's intrinsic light response (e.g. ?40ns in LSO) and hence allows high rate CT operation in singlephoton counting mode. Based on commercial LSO crystals and Hamamatsu S8550 APD arrays, we show the system performance in terms of timing- and energy resolution as well as its rate behavior (SPICE, simulating a high intensity X-ray beam). If proven viable, this technique may lead to the construction of a compact, radiation tolerant, and cost effective PET/CT detection head in one unit.

The performance and limitations of a novel detector technology based on the deposition of a thin-film sensor on top of processed integrated circuits have been studied. Hydrogenated amorphous silicon (a-Si:H) films have been deposited on top of CMOS circuits developed for these studies and the resulting "thin-film on ASIC" (TFA) detectors are presented. The leakage current of the a-Si:H sensor at high reverse biases turns out to be an important parameter limiting the performance of a TFA detector. Its detailed study and the pixel segmentation of the detector are presented. High internal electric fields (in the order of 10/sup 4/-10/sup 5/ V/cm) can be built in the a-Si:H sensor and overcome the low mobility of electrons and holes in a-Si:H. Signal induction by generated carrier motion and speed in the a-Si:H sensor have been studied with a 660 nm pulsed laser on a TFA detector based on an ASIC integrating 5 ns peaking time pre-amplifiers. The measurement set-up also permits to study the depletion of the sensor and results are presented. Finally, direct detection of 5.9 keV X-rays with TFA detectors based on an ASIC integrating low noise pre-amplifiers (27 e/sup -/ r.m.s.) are shown.

We have developed an automated system for the characterization and testing of CdZnTe/CdTe pixel detectors for x-ray and gamma-ray imaging. A set of custom made pogo-pin arrays and corresponding detector holders have been designed for a precise, non-damaging loading and unloading of detectors to a "measurement habitat" within the system. The architecture of the system is flexible, allowing measurements of current, spectral responses and pulse shapes from individual detector pixels. A multi-channel read-out (up to 256 channels) based on CMOS switches make possible the monitoring of leakage- and /or x-ray induced photo- currents sequentially for all individual pixels, for groups of pixels, or for the full detector with different voltage ramping scenario. A measurement of spectral pixel responses can be done with a Single-Photon-Counting ASIC for up to 256 pixels simultaneously, or from individual pixel(s) with discrete read-out electronics. The test system can satisfy many experimental needs including measurements of a detector's: 1) temporal response under x-ray or gamma ray irradiation; 2) photon count rate performance; 3) bulk/contact charge transport properties; 4) guard ring or/and passivation effectiveness, and 5) long term stability. Control and data acquisition can be conducted with a local computer, or via the Internet. The system has been successfully operated for about 2 years. Examples of the results obtained with detectors fabricated from different material vendors are presented.

The development of a front-end circuit optimized for CdZnTe detector readout, implemented in 0.25 /spl mu/m CMOS technology, is reported. The ASIC comprises 17 channels of a charge sensitive amplifier with an active feedback, followed by a gain-shaper stage and a discriminator with a 5 bit fine-tune DAC. The signal from the discriminator is sensed by a 25 ns mono-stable circuit and an 18-bit static ripple-counter. The channel architecture is optimized for the detector characteristics in order to achieve the best energy resolution at a maximum counting rate of 2 million counts/second. The amplifier shows a linear sensitivity of 24 mV/fC with 50 ns peaking time and an equivalent noise charge of about 650 e/sup -/, for a detector capacitance of 10 pF. When connected to a 3/spl times/3/spl times/7 mm/sup 3/ CdZnTe detector the amplifier gain is about 8 mV/keV with a noise around 3.6 keV.

The monolithic integration of electronics and high-resistivity silicon detectors is reported. The approach is based on CMOS circuit integration in the top layer of high-resistivity SOI (silicon-on-insulator) wafers. In a preliminary feasibility study, high-resistivity wafers were subjected to SOI layer fabrication methods and evaluated with a simple diode process for two main characteristics: diode leakage and possible dopant concentration increase. In the second phase of the project, a full SOI-on-H Omega process was executed. MOSFET behavior was then evaluated. >

A novel approach to monolithic pixel detectors based on SOI (silicon-on-insulator) wafers with high-resistivity substrates is being pursued by the CERN RD-19 collaboration. The authors report the results of electrical evaluation measurements performed on the devices fabricated in the substrate. The SOI preparation processes considered (SIMOX and laser or stripheater ZMR) appear to be compatible with the fabrication of detectors of suitable quality in the high-resistivity substrate. With reference to the detecting elements in the substrate, ZMR wafers give very good results. For SIMOX wafers, the main concern seems to be the higher depletion voltage resulting from the increase in effective doping concentration. >

A 12-b switched-capacitor (SC) pipelined A/D converter has been developed in the framework of the CERN LAA project for particle physics detector R&D. The integral linearity of the converter is improved by an autocalibration cycle compensating the ratio error between two nominally identical capacitors. The circuit has been manufactured using a low-voltage 3- mu m CMOS technology. The active chip area including registers and clocking circuitry is 5.25 mm/sup 2/. Experimental results indicate 11-b resolution for 1-MHz sampling frequency, with only 6-mW power consumption. >

We present a prototype binary readout module for the ATLAS Silicon Tracker employing a newly developed readout chip, SCT128B, using the DMILL radiation hard technology [1]. The module design and the basic module components including silicon strip sensors, readout chips and a ceramic hybrid are described briefly. The module performance evaluated in the course of lab test and beam test measurements is reported.

We have studied the analog performance of the HSOI3-HD technology (industrialized by Thomson TCS, St. Egreve, France) up to a total dose of 25 Mrad of ionising radiation. Static parameters and their evolution have been extracted, and particular attention has been devoted to the noise. We found that most of the damage occurs in the first 12 Mrad, so the technology can find applications where tens of Mrad total doses are foreseen. P-channel transistors should be chosen as key elements in low noise ICs, with a maximum degradation of 18% in transconductance and better 1/f noise performance. A Generation-Recombination component in the noise spectra can be controlled through the body bias. We have studied the energy level of the trapping centers responsible for it and found that it is not modified by the irradiation.

We report on a very fast and low noise front-end, implemented in 0.25 /spl mu/m CMOS technology. The CARIOCA amplifier discriminator chip has input impedance of 10 /spl Omega/, in order to be compatible with sensors of large capacitance, and a peaking time of 14 ns. The conversion gain of 8 mV/fC remains almost unchanged up to a detector capacitance of 120 pF. A noise figure of 450e/sup -/ at zero input capacitance with a noise slope of 37.4e/sup -//pF, at a 2.5 V power supply, was measured.

A full custom chip has been built for readout of a multi-element silicon detector in the UA2 collider experiment at CERN. The low-noise performance enables the use of this chip for detecting random particles or single X-ray photons of medium energy (~ 20 keV). It can be used equally well in various other types of particle detectors which produce random signals. The noise is sufficiently low (≪ 0.09 fC r.m.s.) for detection of signals of ~ 0.8 fC, corresponding to 20 keV energy deposit in a silicon detector.