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Thermal measurement and modeling of multi-die packages with vertical (stacked) and lateral arrangement became a hot topic recently in different fields like RAM chip packaging or LEDs and LED assemblies. In our present study, we present results for a more complex structure: an opto-coupler device with four chips in a combined lateral and vertical arrangement. The paper gives an overview of measurement and modeling techniques and results for stacked and multichip module (MCM) structures. It describes actual measurement results along with our structure function-based methodology which helps validating the detailed model of the package being studied. For stack-die packages, we suggest an extension of the DELPHI model topology. Also, we show how one can derive junction-to-pin thermal resistances with a technique using structure functions. [ABSTRACT FROM AUTHOR]

Finding the optimal physical design for an electronic system Is extremely time-consuming. In this paper, we describe a sequential global optimization methodology that can lead to better designs in less time, and illustrate its use by optimizing the design of a heat sink for a simple system. The results show the need for a global approach, the insights that can be gained through automated design optimization, and illustrate the efficiency of the reported methodology in finding the optimum design. [ABSTRACT FROM AUTHOR]

Discusses the role of thermal design and reliability qualification in context to industrial needs for short design cycles and rapid implementation of technologies in the electronics industry. Effects of temperature on electronic device failure; Overview of the physics-of-failure approach; Application of the Arrhenius model.

Focuses on the development of three-dimensional conduction models for microprocessors introduced by Motorola. Objective of the study; Use and limitations of traditional thermal package metrics; Dimensions and thermal conductivities used in detailed models; Conclusion.

Part I. Discusses the criteria adopted as the basis for the selection of experimental methods for validating detailed thermal models of electronic parts. Relationship between users and suppliers envisaged by DELPHI; Basic concepts of thermal characterization of mono-chip packages; Notes on the concept of thermal resistance; Practical range of heat transfer coefficients; Conclusion.

Part II. Describes the experimental methods developed to validate the numerical models generated to characterize a certain electronic part. Test methods and their selection criteria; Double cold plate method; Submerged double jet impingement method; Compact models of monochip packages.

A foreword to the June 2007 isue of "IEEE Transactions on Components and Packaging Technologies" is presented.