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This paper presents organic based logic and memory circuits. All those circuits are made with organic N- and P-type transistors. Organic complementary nand and nor gates were characterized and show performance equivalent to or better than the literature-reported ones. The presented memory circuits include an SRAM memory point and an edge-triggered flip-flop. The flip-flop is made of six organic two-input and three-input nand gates, representing a total of 26 organic transistors for a surface of 170 mm^2. The maximum operating frequency of this flip-flop is 220 Hz under a supply of \pm20~V. All the circuits were manufactured using a standard organic sheet-to-sheet process in ambient air. Electrical characteristics remain identical after repeated measurements. Finally, a model matching the presented circuits' behavior was carried out, permitting the design of more complex circuits. [ABSTRACT FROM AUTHOR]

This letter aims to study a multiantenna tag on a UHF RFID system. Impact of dual antenna on the read range is demonstrated. This letter shows that this enhancement is not only due to a better antenna gain, but also to the design of the backscattering system. Indeed, the backscattering modulator is connected on only one of the two inputs of the antenna. Measurements of prototypes designed in 0.18 CMOS process demonstrate that a tag with such a system stays visible for the reader around 2 m better than a one-antenna system. [ABSTRACT FROM PUBLISHER]

The design of a traveling-wave amplifier (TWA) in 0.13-μm standard CMOS technology is presented. It is designed to maximize the gain-bandwidth product (GBP). An asymmetric cascode, coplanar waveguide (CPW), and loss compensation technique enables maximization of the TWA GBP. Design and modeling of 90-Ω CPW used to synthesize inductors of the TWA lines is presented. Simulations with a design kit and developed models for CPW show a 52-GHz bandwidth with a maximum power gain of 8.5 dB at 10 GHz for a 135-mW power consumption. Measurements up to 40 GHz confirm these results. [ABSTRACT FROM AUTHOR]

Modeling and design of CMOS ultra-high-frequency (UHF) voltage multipliers are presented. These circuits recover power from incident radio frequency (RF) signal and supply battery less UHF RF identification (RFID) transponders. An analytical model of CMOS UHF voltage multipliers is developed. It permits to determine the main design parameters in order to improve multiplier performance. The design of this kind of circuits is then greatly simplified and simulation time is reduced. Thanks to this model, a voltage multiplier is designed and implemented in a low-cost electrically erasable programmable read-only memory compatible CMOS process without Schottky diodes layers. Measurements results show communication ranges up to 5 m in the U.S. standard. [ABSTRACT FROM AUTHOR]

Presents an approach for analyzing multimode waveguide discontinuities. Determination of generalized scattering parameters using a matrix pencil moment method associated with efficient numerically multimode matched loads placed at each physical port of the discontinuities; Analysis of microstrip-coupled lines and coplanar lines asymmetric discontinuities.