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The promotion of integrated energy systems is able to reduce pollutant emissions by using clean energy sources, to promote the replacement of traditional fossil energy with green electricity, and to improve human life quality. In order to popularize integrated energy systems, it is imperative to study its economic applicability. In this paper, according to the cold and thermal electricity load demand, energy prices, equipment technology, the optimization model of the energy system by using the nonlinear integer programming method is firstly established. Then the evaluation index values of different systems are obtained. Secondly, the entropy weight method and analytic hierarchy process (AHP) are applied to obtain the weights respectively. Finally multi-index evaluation model is set up by using the expert evaluation method to determine the important index weight. The simulation results based on the actual data in a certain place show that the evaluation results obtained by the subjective and objective weights are basically consistent, which verifies the accuracy and effectiveness of the proposed method for economic applicability of the typical integrated energy systems.

Accessing distributed photovoltaic (PV) in distribution network will bring many adverse effects. It is very important to study the consumption capacity of distributed PV in distribution network for maintaining the safe operation of distribution network. In this paper, the impact of distributed PV power access on power quality, short-circuit capacity and network loss of distribution network is studied by establishing an optimization model aiming at maximizing the net benefit of photovoltaic accessed. A cuckoo algorithm for solving the problem of PV consumption is proposed. In the actual distribution network model, the economic benefits of PV accessed are analyzed from the aspects of power factor, load level and PV investment coefficient, respectively. The availability of the consumption capacity analysis method proposed in this paper is verified.

Optocoupler is applied to isolate the control loop to the main power stage, and transfer feedback signal in the negative feedback loop of SMPS. But due to surface deterioration and the generation of crystal defects, optocoupler would degrade and result the decrease of the CTR. Once the CTR decline to a threshold, Optocoupler would degrade to failure, leading to the unstability of SMPS. The paper presents a precise and reliable fault diagnosis method to optocoupler in SMPS. According to the method, we can realize real-time and online fault diagnosis to optocoupler by monitoring the Current Transfer Ratio and finishing health assessment to optocoupler by analyzing the degeneration of CTR.

The Lithium-ion battery capacity prediction error is analyzed by use of extended Kalman filtering(EKF) and curve fitting algorithms. This paper employs the capacity degradation model described by Colum efficient factor, rest time and other two unknown parameters. Then, a nonlinear state-space model is introduced, and the EKF is presented to estimate the capacity and the two unknown parameters. The parameter setting in EKF is discussed in details. The capacity prediction error is analyzed with the help of curve fitting. The experiment example demonstrates the algorithms efficiency.

As we know, expendable prognostic cell, such as "canary" and fuse, is a kind of method that can be applied for prognostics, and it fails earlier than the host product, which provides advance warning of failure. In this paper, a prognostic cell was proposed for electromigration (EM) failure of integrated circuit(IC), and it is composed of stress and detection module, two-stage low gain amplifier, high gain comparator, non-overlapping clock generation module, bias voltage generation module, and output module. The prognostic cell was designed to fail faster than host circuit, and was successfully simulated on the base of SMIC 0.18 urn mixed-signal CMOS process model. The output of the prognostic cell could accurately flip from low voltage to high voltage as the amount of resistance increased by more than 20% caused by EM, and the function was verified experimentally. This indicates the impending failure of host circuit, which shows that the present prognostic cell can be used to provide advance warning of EM failure. The research results are useful for the reliability insurance and failure prediction of IC.

Over the last several decades, the multilayer printed boards, especially the high density substrates, have been widely used in electrical industry. Generally the different layers of printed boards are interconnected by the plated-through holes (PTH) and buried/blind vias. The quality and reliability of PTH significantly affect the reliability of printed boards, even the performance of the whole electrical system. So the research of quality, reliability and failure analysis to the PTH is important to make products reliable and to maintain its performance under different loads. The purpose of the paper is to introduce the methods of quality control of PTH and the key failure modes of PTH in high density printed board. The key failure modes of PTH such as plating voids, plating crack and conductive anodic filament (CAF) were presented. At the same time, several typical PTH failure cases were used to show how the failure occurred. We also investigated the failure mechanisms and found the root causes by using some conventional methods of failure analysis such as metallography microscope inspection and SEM&EDS analysis. The plating crack is mainly driven by the mismatch between the different material properties, such as coefficient of thermal expansion (CTE), hygro-swelling and vapor pressure induced expansion. For CAF failure, the mechanism is an electrochemical transport of ions across an electrical potential between anode and cathode. This paper also introduced an accelerated evaluation method to identify the CAF failure. Finally, for reliability improvement, several suggestions were given to prevent the PTH failure.

How to predict the end of discharge time for Li-ion battery is one of the most important problems in the field of battery health management. This paper proposes a linear regression model to describe the relationship between the end of discharge time and discharge cycle. Moreover, the model verification shows that the discharge cycle has significant effect on the end of discharge time and that the proposed model has good fitness in fitting Li-ion discharge data. This paper also presents the end of discharge time predictions for Li-ion battery based on the linear regression model.

Prognostics and health management has become a preferred approach to achieve warning or respond to impending failure of electronic systems. A prognostic circuit for hot carrier injection (HCI) failure of integrated circuit was proposed in the paper, and it was simulated on the base of the SMIC 0.18 um mixed-signal CMOS process model. The prognostic circuit consists of stress voltage generation module, HCI failure detecting module, two-stage comparator, offset voltage cancellation module, non-overlapping clock generation module, and output module. When the increase amount of threshold voltage for the MOSFET exceeds a preset value due to hot carrier injection, the output of the prognostic circuit designed to fail faster will jump from low voltage to high voltage. It indicates the impending failure of hosted circuit because of that the prognostic circuit experiences the same manufacturing process and operational environment as the hosted circuit. The research results are useful for the prediction of HCI degradation and failure of integrated circuit.

The plating system of electroless nickel immersion gold (ENIG) has been widely used to finish solder pads of printed circuit boards (PCBs). The most attractive advantage of ENIG over other finishes is that it can be applied to fine-pitch assemblies such as BGAs, for superior surface mount component placement and solderability because of its coplanarity. ENIG is used by many board shops and is an established process. But recently many problems occur in ENIG solder joints. The worst cases are BGA package solder joint failures during the surface mount assembly process, or in the product's final use by a consumer. Based on the authors' long-term experience of solder joints failure analysis, two kinds of key failure modes for ENIG solder joints were found. One was poor wetting (non-wetting or de-wetting) of the solder to the ENIG surface finish on PCB pads during soldering process, and the other one was solder joint crack or separation from the nickel layer surface, causing an electrical open. At the same time, several typical solder joint failure cases were used to show how the two kinds of failure modes occurred. SEM was used to reveal more details of the microstructure of ENIG plated pad surface and the fracture at the interface between solder and metal pad. The plating composition and phosphorous (P) content were determined by EDX analysis. Additionally the failure mechanisms were investigated. The root cause for poor wetting was the poor solderability of corroded Ni layer which was the result of galvanic hyper-corrosion of the plated electroless Ni by the Au plating bath. For solder joint crack, the reason was the weak bonding due to P-rich layer resulted from Ni depletion at the surface from IMC formation. Finally, in order to prevent the two kinds of key failure modes, several suggestions were given.

Solder joints on the Printed-Circuit board (PCB) serve as mechanical and electrical connections. Their function maybe simple, but the reliability of the solder joints may affect the entire device or system. They are usually the weak links when the electronic products are exposed to a variety of load conditions from their operation and storage, such as temperature cycling, vibration, shock and humidity. One of the most important parameters of solder joints is electrical stability. The resistance or impedance will rise as the fracture spreads through the solder joints. The reliability of solder joints is often determined through continuous DC resistance measurement, but it not very sensitive. In recent years, Time Domain Reflectometry (TDR) technique has been found to be a better alternative that are required for monitoring the degradation of interconnects. At high frequencies, signal propagation is concentrated at the surface of interconnects, a phenomenon known as the skin effect. Degradation of interconnects, such as cracking of solder joints due to fatigue or shock loading, also usually initiates at the surface and propagates inward. Therefore, even a small crack at the surface of a solder joint may change RF impedance. A physical crack initiated at the surface of the solder joints results in the increase of RF impedance. Thus, the crack length should be correlative with RF impedance or Reflection Coefficient, and the failure time of the solder joint could be estimated in view of electronic theory and the theory of fracture. A mathematic model was proposed to predict the relationship between the time domain reflection coefficient of solder joint and the crack length in it. Impedance-controlled circuit boards on which surface mount components were soldered have been developed. Partially and entirely cracked solder joints were produced for test in advance. The RF impedance was observed to increase in response to partial cracking of the solder joint, while the DC resistance did not indicate any anomalies. The technique of RF impedance analysis shows potential as a prognostic tool that can provide advanced warning of impending failures of solder joint.

The temperature-dependent DC conduction mechanism in BaTiO 3 -based multilayer ceramic capacitors has been discussed in this paper. In the high electric field, BaTiO 3 -based Multi-Layer Ceramic Capacitor (MLCC) showed different DC conduction mechanism in room-temperature, Curie-temperature, and high-temperature regions. The DC conduction mechanisms at room and high temperature are Schottky effect and ionic flow, respectively. However, the mechanism at Curie temperature showed a tunnel-like current, abnormal temperature-independence DC conduction current. For the study of this abnormal phenomenon, the structural nature of insulting solids of practical importance is emphasized. Based on the relation of barrier height and phase transformation, the Curie-temperature region is actually controlled by Schottky process. The DC conduction mechanism of BaTiO 3 -based MLCC in Curie-temperature region can compatibly explained by the change of barrier height resulting from phase transformation.

Carbon isotopes in loess through S 0 to S 11 at Luochuan section in Shanxi province, China were studied. The curve of δ13C compares well to that of the oxygen isotope in deep sea sediments from Deep Sea Drilling Project Site 607 drill hole. There is a negative peak of δ13C within S 5 paleosol where the content of δ13C is −16.615‰, shows that the climatic of that period is optimum, and the vegetation is likely forest. Compared with the pollen analysis, we conclude that the vegetation type of palesol S 0 ,S 1 ,S 4 ,S 8 ,S 9 , whose δ13C content is −5.85–−10.00‰, is forest-grass. The d13C content of paleosol S 2 , S 3 , S 6 , S 7 is −8.72∼−6.95‰, and their vegetation is grass. The loess layer L 1 , L 2 , L 5 , L 6 , L 8 , L 9 represent the severe cold-dry glacial period with the δ13C content of −3.7– −2.27‰, and their vegetation belongs to steppe-desert. The research of paleo-vegetation type is significant to anti-soil erosion in the loess plateau of China.

In this paper, hydrodynamic lag in ground water is studied on the basis of achievements of principles and technical knowledge relating to flow in porous medium.Due to hydro dynamic lag character in phreatic aquifer,the ground water flow field can be divided into perturbation part and no perturbation part,that illustrates the boundary of phreatic aquifer is changeable .The degrees that the change of impervious boundary exerts influence over calculation of isolated well model in phreatic aquifer is analyzed.Thus,a physical model with time—dependent boundary in phreatic aquifer is established. The model with time dependent boundary can be superposition of a series of isolated well model with variable impervious boundary.Applied superposition principle,analytical solution of the model is derived.

CMOS integrated circuits have certain defined failure mechanisms that can contribute to end-of-life failure. These failure mechanisms include time dependent dielectric breakdown, electromigration, hot carrier injection and so on. All of these common failure modes are far worse at geometries below 0.18 µm. The traditional reliability predictions for integrated circuits are inaccurate because they do not account for the actual environments that the circuits are subjected to in its life cycle. Prognostics is a method that enables monitoring the state of reliability of a product in real time, and therefore can be used to provide advance warning of a failure, to provide condition based maintenance and to help in IC design and development. Pre-designed Prognostic cells are incorporated into integrated circuits to provide advance warning of failure for specific wear-out failure mechanisms. The time to failure of these prognostic cells can be pre-calibrated with respect to the time to failure of the host circuit. The accurate failure prediction and the remaining luseful life for specfic failure mechanism were achieved from the prognostic cell with the proper prognostic distance.

A frequent cause of failure of portable and hand-held devices is an accidental drop to the ground. The effect of electromigration on the mechanical properties of solder joints was discussed in this paper. Without current stressing, the samples were broken in the bulk of solder or at the interface of Al interconnect and solder. if the Al-solder interfacial mechanical strength was improved by changed the interfacial structure or optimized the jointing process, the flip chip devices would show the lonely ductile fracture in the bulk of solder. After electromigration the samples were broken abruptly at the interface near the chip side while the bulk of the solder joints maintained the original shape. Due to the interfacial reaction and the polarity effect of electromigration on the interfaces, a ductile solder joint can become a brittle solder joint. The ductile-to-brittle transition is very sensitive to a high speed shear stress applied to the joints. Because solder alloys are ductile by nature, it is of interest to understand how electromigration can influence the mechanical properties of solder joints' interfaces and change their ductile nature. Owing to the polarity effect of electromigration, vacancies will accumulate to form voids at the cathode interface of solder joints. Besides, much more intermetallic compound formation at the joint interfaces also caused the ductile-to-brittle transition. Thus the interfaces become more and more brittle with time due to IMC formation or vacancy accumulation from electromigration.

Electromigration in flip-chip bumps of Sn3.0Ag0.5Cu has been studied at current density of 2.03×104 A/cm2. Three potential failure modes induced by electromigration in SnAgCu flip-chip bumps were investigated in terms of microstructural evolution. According to IPC standard or U.S. Military Standard (MIL-STD), all theses three kinds of damages would be determined failure in failure-analysis procedures for microcircuits.