44 results on '"Lu, C-Y"'
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2. 3D Monolithically Integrated Device of Si CMOS Logic, IGZO DRAM-like, and 2D MoS2 Phototransistor for Smart Image Sensing
3. A Novel Data Recovery Technique for 3D TLC NAND Flash Memory Using Intercell Program
4. Wafer Level System Integration of the Fifth Generation CoWoS®-S with High Performance Si Interposer at 2500 mm2
5. Weakly-Supervised Image Semantic Segmentation Using Graph Convolutional Networks
6. Video Rescaling Networks with Joint Optimization Strategies for Downscaling and Upscaling
7. Electrical method to localize the high-resistance of nanoscale CoSi2 word-line for OTP memories
8. Data hiding using visual secret sharing and joint fractional Fourier transform correlator
9. Device Instability of ReRAM and a Novel Reference Cell Design for Wide Temperature Range Operation.
10. Failure analysis of off-state leakage in high-voltage word-line decoder circuit of memory device
11. Quantum computing with linear optics and multi-photon entanglement
12. Great reduction of interfacial traps in Al2O3/GaAs (100) starting with Ga-rich surface and through systematic thermal annealing
13. Resonance fluorescence from a quantum dot spin
14. Resonance fluorescence from a singly charged quantum dot
15. Cell endurance prediction from a large-area SONOS capacitor
16. ZnO nanowire-based oxygen gas sensor
17. GaN photodetectors prepared on silicon and sapphire substrates
18. The Impact of Interference on Multi-Level-Cell Applications in Scaled Nitride-Storage Flash Memory
19. Numerical Simulation of Programming Transient Behavior in Charge Trapping Storage Memory
20. A Highly Reliable Self-Aligned Graded Oxide WOx Resistance Memory: Conduction Mechanisms and Reliability
21. A Novel Non-Volatile Memory Cell Using a Gated-Diode Structure with a Trapping-Nitride Storage Layer
22. A Highly Stackable Thin-Film Transistor (TFT) NAND-Type Flash Memory
23. Robust stabilization of uncertain discrete time systems with state delay
24. Monolithic integration of three-dimensional multimode interference couplers with silicon photonic wires via self-profile transformation.
25. A New Timing Recovery Method for DTV Receivers.
26. An analog/digital BCDMOS technology with dielectric isolation-devices and processes.
27. Process limitation and device design tradeoffs of self-aligned TiSi/sub 2/ junction formation in submicrometer CMOS devices.
28. A comprehensive study on p/sup +/ polysilicon-gate MOSFET's instability with fluorine incorporation.
29. High-performance salicide shallow-junction CMOS devices for submicrometer VLSI application in twin-tub VI.
30. Computer-simulated explosion of poly-silicide links in laser-programmable redundancy for VLSI memory repair.
31. Explosion of poly-silicide links in laser programmable redundancy for VLSI memory repair.
32. Cross-correlation of system outputs-ambiguity function.
33. A Comparative Study of NBTI and RTN Amplitude Distributions in High- \kappa Gate Dielectric pMOSFETs.
34. Electrical Characterization of \Al2 \O3/n-InAs Metal–Oxide–Semiconductor Capacitors With Various Surface Treatments.
35. Corporate strategies in the face of changing waste strategies.
36. Submicrometer salicide CMOS devices with self-aligned shallow/deep junctions.
37. Limitation of spacer thickness in titanium salicide ULSI CMOS technology.
38. Reverse short-channel effects on threshold voltage in submicrometer salicide devices.
39. Anomalous C-V characteristics of implanted poly MOS structure in n/sup +//p/sup +/ dual-gate CMOS technology.
40. A folded extended window MOSFET for ULSI applications.
41. A low-power programming technique for polysilicon fuses.
42. Resonance fluorescence from a quantum dot spin.
43. Quantum computing with linear optics and multi-photon entanglement.
44. Second-order statistics of the wavelet transform of multiplicative white stochastic process.
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