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Inductor design can be a process of repetitive core searching and iterative turn and airgap calculation, where every decision to be made involves a trade-off in terms of power loss, cost and power density. This paper deeply discusses the inductor design for a transformerless DC EV battery charger where inductance and operating DC bias are required to be high ( $\mathrm{500}\ \ \mu \mathrm{H}$ and 32 A). The design of the charger's filter is discussed to provide the values of the passive components and to motivate the inductor design. Two commonly used but seldom compared winding options, Litz wire and printed circuit board, are both designed and examined with respect to power loss and difficulty of the fabrication. Through tuning of the trace width and copper weight, the PCB design can provide similar performance to the Litz wire configuration, at higher cost and increased manufacturing complexity. In order to verify the text-colorblacktheoretical calculations, high-fidelity 3D finite element analysis is performed for both inductor types. After comparison, the Litz wire implementation was chosen for its reduction in power losses, cost and manufacturing complexity. The Litz wire inductor is assembled and tested on a transformerless DC charger platform with ≥ 99% efficiency at 11 kW and ≥98% efficiency at up to 22 kW.

The transformer is one of the most bulky, expensive and lowest efficiency components in a typical electric vehicle charging system. Its removal is conducive to enabling greater proliferation of charging infrastructure and the adoption of electrified vehicles. However, simply removing it can lead to common mode voltage and leakage current issues that present a safety hazard. To address this and to be compliant with international standards, a transformerless electric vehicle charging system enabled by control is proposed without need for additional components. This is achieved by connecting the three-phase filter capacitor neutral point to the DC negative, which allows the zero sequence voltage to be controlled, thereby mitigating leakage currents. Simulations show that the leakage current of the proposed transformerless charger can be made standard compliant with the topology while experiments provide validation through zero sequence voltage and active and reactive power steps. The results demonstrate that the transformer can be removed from electric vehicle chargers.

This paper focuses on the transformerless fast charging solution of plug-in electric vehicles (PEV). In a PEV system, the chargers can be classified into three levels: ac level 1 ( 19.2 kW) [1]. For the high-power level 3 fast charging system, it is not viable to place an on-board charger due to the volume and weight. We propose two topologies for off-board non-isolated DC charger to provide fast DC charging with high-power (up to 22 kW). The proposed topology includes two stages, AC/DC rectifier and DC/DC converter. According to the grid requirement, the AC/DC rectifier topologies can be divided into single-phase and three-phase applications. For the three-phase grid interface, the design of the DC charger uses the same hardware for both the grid interface and the DC/DC stage. The development and manufacturing costs are reduced due to the symmetric design of the two stages of circuit. The leakage current issue of the non-isolated system is solved based on the proposed topologies and the volume and weight are largely decreased because of the transformerless structure. The design procedures and a typical three-phase prototype are shown in this paper to verify the proposed structures.

We propose a hardware-based solution for performing real-time workload forensics that enables identification of a process while it is being executed. More specifically, we divide execution flow of a process into consecutive frames and we extract descriptive features related to the Translation Lookaside Buffer (TLB) utilization profile for each such frame. These features are then processed through trained machine learning models to analyze program behavior and identify workload at the granularity of a process. Unlike previous research on workload forensics that performs ex post facto analysis based on the complete process execution profile, this method continuously analyzes the segmented workload execution flow; thus, it does not require knowledge of process creation, switch, and termination timestamps. Furthermore, as compared with software-based workload forensics solutions, whose data logging mechanism may be compromised by software attacks, the proposed hardware-based logging mechanism does not rely on services from the operating system (OS) or high-level applications and is, therefore, inherently immune to software tampering. The proposed workload forensics method was evaluated using a Linux OS loaded on Spike, an open-source RISC-V simulator. Experimental results using the Mibench benchmark suite indicate an overall identification accuracy of 98.9% with practicable logging overhead.

To improve power density and efficiency, a critical soft switching principle with optimal-frequency model predictive control method is proposed in this paper for DC/DC power converter. Firstly, this paper analyzes the boundary constraints of critical soft switching that are derived with the key parameters of the interlock time and threshold current for typical SiC and GaN devices. Then, according to the derived critical soft switching constraints, two optimal-frequency control methods are proposed based on model predictive control (MPC) to eliminate the turn-on losses especially during the transient period. Compared to the traditional PI controller, the efficiency can be further improved during the reference variation period, because of the fast response of MPC. Finally, the test results verify the theoretical analysis.

In electric vehicles (EV), the charging circuit is an important component which needs to be carefully designed. This research proposes a novel concept to reconfigure the traction circuit to achieve a low-cost bidirectional charging circuit that is capable of providing V2G services. High charging efficiency is achieved omitting an isolating transformer and parasitic common mode currents are attenuated by controlling the common mode voltage with suitable common mode paths. Compared to typical EV charger topologies, the proposed concept increases efficiency, adds bidirectional operation, and reduces costs by repurposing existing drivetrain components. Then the proposed reconfiguration concept is analyzed and the specific working principles are described. The analysis is verified by simulation and on an experimental test bench.

Electric vehicles (EV) are developing fast and EV ownerships are increasing rapidly. In the EV system, the electric traction inverter and the charging converter are two important components that will largely determine the performance of the EV. The research targets transformer-less integrated charging systems that have the potential to reduce the cost, volume, and increase efficiency. The proposed concept does not require a charging rectifier or isolating transformer and admits bidirectional operation that is the basis for providing V2G services to the grid. The omission of galvanic isolation permits common mode currents in the charging system during charging mode since both grid and vehicle chassis are grounded during charging. These currents are well controlled using a secondary converter that acts as an active filter. Furthermore, the omission of the isolating transformer increases the efficiency of the vehicle charger similar. The proposed topology is verified by simulation and on an experimental test bench.

In a photovoltaic grid connected system, the attenuation of the common mode voltage is one of the main issues. Many single phase inverters have been proposed to improve the common mode characteristic. However, few studies have been focused on the topological improvement for common mode behavior of the three phase inverter. This paper proposed two types of novel three phase NPC inverters with low leakage current. The common mode characteristic of the inverter can be improved by the proposed NPC circuit. Firstly, the common mode model of the three phase inverter is analyzed. Then, the improved three phase NPC circuit and the variation topology are introduced with the operating principles. Thirdly, a comparison between the improved NPC inverters and the traditional three phase NPC inverters illustrated that the proposed topologies have the advantages in the aspect of device cost and conduction losses. Finally, the simulation results verified the theoretical findings.

Kernel rootkits generally attempt to maliciously tamper kernel objects and surreptitiously distort program execution flow. Herein, we introduce a hardware-assisted hierarchical on-line system which detects such kernel rootkits by identifying deviation of dynamic intra-process execution profiles based on architecture-level semantics captured directly in hardware. The underlying key insight is that, in order to take effect, malicious manipulation of kernel objects must distort the execution flow of benign processes, thereby leaving abnormal traces in architecture-level semantics. While traditional detection methods rely on software modules to collect such traces, their implementations are susceptible to being compromised through software attacks. In contrast, our detection system maintains immunity to software attacks by resorting to hardware for trace collection. The proposed method is demonstrated on a Linux-based operating system running on a 32-bit x86 architecture, implemented in Simics. Experimental results, using real-world kernel rootkits, corroborate the effectiveness of this method, while a predictive 45nm PDK is used to evaluate hardware overhead.

Safe and stable operation of power transformers is the basis for normal supply of electricity and thereby normal social production and life. Timely fault identification plays a very important role in improving technical maintenance of transformers. Traditional diagnostic methods such as three-ratio method, diagnose faults based on threshold values. In consideration of their limitations due to incomplete codes and too absolute code range definition, this paper proposes a new fault diagnosis method based on grey relational analysis and integrated weight determination. The grey relational analysis model is introduced and its discrimination coefficient is adjusted. Further, to overcome the shortcomings of the grey relational model, the weight of each indicator is determined by integrating analytic hierarchy process and entropy methods. Making use of case data from other studies, it has been demonstrated that our enhanced model can effectively improve the accuracy of fault diagnosis.

We introduce a hardware-based methodology for performing on-line intrusion detection in microprocessors. The proposed method extracts fingerprints from the basic blocks of the routine executed in response to a system call and examines their validity using a Bloom filter. Implementation in hardware renders spoofing attacks, to which operating system or hypervisor-level intrusion detection methods are vulnerable, ineffective. The proposed method is evaluated using kernel rootkits which covertly modify the system call service routines of a Linux operating system running on a 32-bit x86 architecture, implemented in the Simics simulation environment, while hardware overhead is evaluated using a predictive 45nm PDK.

We investigate the possibility of performing workload forensics and/or malware detection in microprocessors through exclusively hardware-based methodologies. Specifically, we first introduce a general architecture which a hardware-based forensics or malware detection method would need to follow, as well as the various processor-level information which could potentially be harnessed to ensure system security and/or integrity. In contrast to traditional forensics and/or malware detection methods implemented at the operating system (OS) and/or the hypervisor level, whose data logging and monitoring systems are vulnerable to spoofing attacks at the same level, moving implementation to hardware ensures immunity to such attacks. This work focuses on two recent incarnations of this general concept, illustrating the effectiveness of hardware-based forensics and/or malware detection. Several other recent methods related to this topic are also discussed. Experimental results corroborate that even a low-cost hardware implementation can facilitate highly successful forensics analysis and/or malware detection, while taking advantage of its innate immunity to software-based attacks.

We present our experiences in implementing hardware-based attacks to subvert the results of an election system. The election system was outlined by the Cyber Security Awareness Week (CSAW) Embedded Security Challenge (ESC) competition in 2015, held at the New York University (NYU). The system had multiple layers of security and primarily used homomorphic encryption. The competition presented a challenge to hack the election system such that a preferred candidate wins the election. We cryptanalyzed the given election system to evaluate the effectiveness of various theoretical and practical attacks, and used a custom designed embedded system to demonstrate our attacks. The embedded system was implemented on a Nexys 4 DDR Artix-7 FPGA board. Our work, which earned the first place in the competition, demonstrates that low-cost hardware-based attacks can indeed lead to catastrophic consequences.

In the transformerless grid connected photovoltaic system, the inverter is the main component. In order to improve the efficiency of the inversion system and achieve a low level of leakage current, several topologies have been applied, among which three level NPC inverter is a kind of popular application. Because the three level NPC inverter has the advantages of low switching losses, good common mode behavior and the small output distortion. This paper proposed a kind of novel three level half bridge NPC inverter with high reliability. The topology only assumes four switches and two diodes with a constant common mode voltage. More importantly, compared to the traditional half bridge NPC inverter, the proposed topology can avoid the shoot through problem without adding the dead time. Also, the novel topology has a lower conduction losses compared to most of the NPC half bridge inverters and the dual buck typed half bridge inverters. The common mode model and the operating principles of the novel topology is analyzed which has verified the advantages. Meanwhile, the three phase structure of the proposed topology is introduced to further illustrate the applications. Finally, the simulation and experimental results illustrated the theoretical findings.

The distributed inverters are integrated into grid without coordinated PWM and the switching ripples of inverters are randomly accumulated at point of common coupling (PCC). Global synchronous pulse width modulation (GSPWM) can attenuate the accumulated switching ripples. This paper proposes time compensation method which compensates the time delay of synchronization signals for inverters in distance. Then, this paper proposes distributed calculation method for optimal phase shift and synchronization frequency in large-scale application. This new method is much faster than before. Finally, Matlab simulations and experimental results are presents to verify the performance of proposed methods.

The current source inverter (CSI) has some application restrictions, especially for the power efficiency problem. The H7 current source inverter is a promising topology since it provides a shunt-connected switching path and significantly reduce the power dissipation. This paper reviews the already published H7 CSI configuration character with its modulation strategy in theory and proposes an optimal modulation scheme which has the minimized hard switching counts. In addition, the grid-tied operational principle has been discussed. The proposed modulation strategy could reduce the working power dissipation, simplify the configuration of the shunt-connected switch, and meanwhile guarantee the zero current switching ability for the rear-end CSI circuitry. The switching counts and hardware cost are compared between the different modulation schemes to prove the superiority of the proposed optimal switching counts modulation strategy. The simulation and experimental results verified the theoretical findings.

Reliable life is defined as the average operation time of power equipment in a given reliability, and it is a significant parameter in reliability evaluation. This paper presents a reliable life calculation method for SF 6 circuit breakers. The reliability evaluation model is established based on Fault Tree Analysis (FTA) method. From FTA, all the bottom events which cause top event (failure of the SF 6 circuit breaker) are found. To estimate the reliability by inspection results and test results of the circuit breakers, Health Index (HI) is presented to calculate the failure probability of each bottom event, then the reliability of the top event is obtained. Collecting the failure probability and the age data of different SF 6 circuit breakers with the same type in power system, the data is applied to estimate the reliability function of two parameters Weibull distribution by the least square method. Finally, the reliable life of the SF 6 circuit breaker in a given reliability is estimated after inversion calculation by reliability function. To make further understanding of the method, an application example is presented, and the calculation result shows the effectiveness and accuracy of the model. According to the detailed analysis, the reliable life has more advantage than the physics life to reflect the reliability level of the power equipment.

The association rule from data mining technology was applied into transformer defect analysis so that the frequent pattern, the dependency and the causality between classification and decision attributes could be found based on data of defects. As a result, correlation properties among grid fault elements were seized macroscopically. In this paper which focused on the frequent item mining algorithm research for transformer defect correlation analysis, the definitions related to the association rule were introduced. Specific to weaknesses of traditional Apriori algorithm, an efficient analogous frequent item set mining algorithm was presented. With regard to the instance, association rule analysis was carried out for data of transformer defect in Shandong. Relevant results indicated that diverse attribute items were undoubtedly associated with each other to different degrees; in addition, the correlation obtained was adopted to perform operational maintenance for auxiliary equipment and parts, etc. that are vulnerable to defects.

In the transformerless grid connected photovoltaic system, the inverter is the main component. In order to improve the efficiency of the inversion system, several topologies have been applied, among which three level NPC inverter is a kind of popular application. Because the three level NPC inverter has the advantages of low switching losses, good common mode behavior and the small output distortion. This paper proposed a kind of novel three level half bridge NPC inverter which only applies four switches with a constant common mode voltage. Compared to the traditional half bridge NPC inverter, the proposed topology consumes less devices and has a lower conducting losses. The common mode model of the novel topology is analyzed which has verified the good common mode behavior. The three phase extended topology of the proposed inverter is also introduced with a novel modulation strategy. With the proposed modulation strategy, the three phase inverter has a constant common mode voltage. Finally, the simulation and experimental results illustrated the theoretical findings.

Condition-based maintenance (CBM) strategies for power equipment are influenced by many factors, such as the equipment's health condition, connecting relations between each equipment and the load level of a substation. This paper presents a new method to optimize the maintenance strategies for different power equipment. Through analyzing the connection relation between different equipment, some of them are determined in the same maintenance unit because they are able to maintain in the same time. According to the inspection and test result of the equipment, more than one alternative maintenance strategies are proposed. Then, the optimization model of CBM in a substation is established. Considering the load level in the substation during the period of maintenance, the calculation method for Reparation Cost, Interruption Cost and Maintenance Cost are put forward, and the sum of three cost are defined as Total Cost. The goal of the model is to select the appropriate strategy with minimum Total Cost. Finally, an application example in a 220kV substation is proposed. The result indicates that the method can reduce the outage time and outage loss cost obviously and improve power supply reliability and economy of the substation.

In a transformerless inversion system, the suppression of common mode leakage current is one of the most important issues concerned. Several single phase full bridge PV inverters have been proposed to eliminate the leakage current. However, in the three phase applications of the PV inverters, few attentions have been paid on the improvement of leakage current from a topological point of view. This paper focuses on the reduction of common mode voltage in three phase transformerless inverter. Firstly, the common mode characteristic of the three phase inverter is analyzed. Then, a kind of novel three phase topology is proposed to suppress the common mode voltage. Also, the NPC circuit can be added to the novel topology in order to further reduce the common mode voltage. The novel topology has the advantages of fewer device cost and lower conduction losses compared to the traditional three phase NPC topologies. Finally, the simulation and experimental results illustrated the theoretical findings.

Converter transformer is one of the most important equipment in ultra-high voltage direct current transmission system, periodic preventive maintenance strategy is widely in its maintenance. Excessive maintenance often arises in the attempt to always ensure the reliable operation of converter transformers. To solve this problem, this study proposes a maintenance decision optimization method for converter transformers that is based on life-cycle cost(LCC). This approach introduces the concepts of LCC and discount rate, obtains an LCC model of the converter transformer and presents the value conversion method; by improving the maintenance equipment failure rate and the calculation method of economic losses, this method improves the accuracy of failure loss cost in the LCC model; by comparing the different maintenance modes of the converter transformer LCC, the reasonable maintenance strategy is optimized, thereby achieving the objectives of reliability and economy. A decision-making example using a ±800kV converter transformer shows that the proposed method can calculate the LCC of converter transformers, yield the optimized maintenance strategy and provide technical support for condition-based maintenance of the converter transformers.

We introduce a hardware-based methodology for performing workload execution forensics in microprocessors. More specifically, we discuss the on-chip instrumentation required for capturing the operational profile of the Translation Lookaside Buffer (TLB), as well as an off-line machine learning approach which uses this information to identify the executed processes and reconstruct the workload. Unlike workload forensics methods implemented at the operating system (OS) and/or hypervisor level, whose data logging and monitoring mechanisms may be compromised through software attacks, this approach is implemented directly in hardware and is, therefore, immune to such attacks. The proposed method is demonstrated on an experimentation platform which consists of a 32-bit x86 architecture running Linux operating system, implemented in the Simics simulation environment. Experimental results using the Mibench workload benchmark suite reveal an overall workload identification accuracy of 96.97% at an estimated logging rate of only 5.17 KB/sec.

The transformerless inverters have the advantages of low cost and high efficiency, which attract more attentions in the field of photovoltaic (PV) power generation system. However, the transformerless grid connected system has the main challenge for keeping low leakage current due to the non-isolation configuration. To better attenuate the leakage current in single-phase system, a few of neutral point clamped (NPC) topologies have been proposed. This paper further proposes a kind of universal neutral point clamping method to build the single-phase NPC PV inverters, which only employs one additional switch to connect the midpoint of dc link and the circulating circuit. Since only the leakage current flows through the additional switch, the single-phase NPC inverter could still maintain the high operational efficiency with the significantly attenuated leakage current. The working principles of the proposed method and the corresponding NPC inverters are analyzed in detail. The simulation and experimental results verified the theoretical findings.

In an inversion system, high reliability is one of the main targets pursuing. Some problems will threaten the reliability of the system, such as the shoot through issue and the failure of reverse recovery. The dual buck inverters can solve the above problems without adding dead time but the low magnetic utilization increases the volume and weight of the system. This paper firstly reviews the traditional dual buck topologies and a single inductor dual buck inverter which can make full use of the inductance. Then a kind of H3 dual buck phase leg with buffer inductor is proposed to improve the reliability of the MOSFET inverter. The novel method maintains the dual buck topologies' advantage of high reliability and can make full use of the inductance. Also, compared to the single inductor dual buck topology, the novel method can achieve lower conducting loss and simpler controlling strategy. Finally, the simulation and experimental results verified the theoretical analysis.

In a DC-AC system, some problems may threaten the reliability of the whole system, such as the shoot through issue and the failure of reverse recovery. Some methods are proposed to improve the reliability of the converters. The dual buck inverters can solve the above problems without adding dead time but the dual buck topology has a main drawback of low magnetic utilization which increases the volume and weight of the system. This paper firstly summarizes the traditional dual buck topologies including a kind of single inductor dual buck inverter which can make full use of the inductance. Then a method to improve the reliability of the MOSFET inverter is proposed. A kind of novel dual buck inverter with series connected diodes and single inductor is introduced. The novel inverter retains the dual buck topologies' advantage of high reliability and can make full use of the inductance. Also, compared to the traditional single inductor dual buck topology, the controlling strategy of the proposed inverter is simpler. Finally, the simulation and experimental results verified the theoretical analysis.

In a transformer-less photovoltaic (PV) grid-connected system, there exists a galvanic connection between the grid and the PV array. Without any transformer in the inverter, common-mode leakage currents can flow through the stray capacitance between the PV array and the ground. This paper first analyzes the equivalent common-mode circuit of single-phase inverter, and compares several single-phase inverters with constant common-mode voltage. This paper then proposes a novel dual half-cycle-bridges (DHCB) single-phase PV inverter with low conduction losses. A novel hybrid SPWM modulation method is introduced to achieve the minimum switching losses under any power factor operation. Next, adding a neutral point clamped circuit to the DHCB inverter, the common-mode voltage can be clamped to half of DC voltage firmly. Finally, simulation and experimental results have validated the theoretical findings.

The common-mode leakage current should be carefully considered when designing a transformer-less photovoltaic (PV) inverter since the leakage current can cause the output current distortion and increase the operational risk. The unipolar SPWM of traditional H-bridge inverter can produce superior output performance but will cause a high-frequency common-mode voltage and consequently the non-negligible leakage current. To attenuate the fluctuation of common-mode voltage, few neutral-point-clamped circuits have been designed to clamp the neutral point voltage and maintain the common mode voltage constant. This paper reviews the already published single-phase inverters with constant common mode voltage in theory and proposes a generalized design principle of multi-terminal neutral-point-clamped circuits, whose unidirectional and bidirectional variations are fully analyzed respectively. Subsequently, two families of new single-phase PV inverters with neutral-point-clamped circuits are proposed. Also, the efficiency, cost and control complexity are compared between the proposed topologies and the traditional NPC inverters to prove the superiority of the proposed topologies. The simulation and experimental results verified the theoretical findings.

GacS/GacA global two-component regulatory systems are comprised of a membrane-bound environmental sensor, GacS, and a transcriptional response regulator, GacA. GacS/ GacA homologs have since been identified in some plant pathogenic bacterial. A current model proposes that GacS senses a still-unknown signal and activates, via a phosphorelay mechanism, the GacA transcription regulator, which in turn triggers the expression of target genes. Certain genes whose expression is regulated by the GacS/GacA system are regulated in parallel by the small RNA binding protein RsmA (CsrA) at a posttranscriptional level. It is suggested that the GacS/GacA system operates a switch between primary and secondary metabolism, with a major involvement of posttranscriptional control mechanisms.

To efficiently recover blurred image degraded by vibration, this paper proposes a way to simulate vibration blurred images and measures direction and amplitude of vibration and gets movement parameters of vibration and point spread function of blurred image. The simulation method of time part image superposition is given according to degradation model of vibration blurred images and character of integral. The direction and amplitude of vibration are measured from spectrum of blurred image by the way of two times Radon transform. Analysis results show the principle of the simulation is correct and the measurement method achieves good performance. Research conclusion provides important basis for designing an effective image restoration algorithm.

This paper addresses the dynamic migration strategy towards FTTH. A complete and generalized migration model is proposed, subject to intermediate steps, different migration paths and various time schedules. To find the best migration path, a techno-economic study is fulfilled in terms of technologies, time-dependent CAPEX, OPEX, revenue, and time period. For the migration to FTTH, several fixed access technologies are taken as multiple intermediate steps, which lead to a nonlinear optimization problem. Based on previous cost-revenue modelling, VBA is applied to implement this migration problem. Different scenarios have been studied and discussed, including optimal migration paths and key parameters. Furthermore, the proposed strategy for one-/multi-step migration process can be extended for other Next Generation Network (NGN) migration problems.

Simulation is an effective way to study P2P systems. But for the popular file sharing software eMule, there is no eMule simulator to date. In this paper, we release the first eMule simulator, which simulates the internal mechanisms of the eMule software, such as requesting source list from server, publishing shared file list to server, connecting to other clients and requesting for uploading, credit and queue system, part selection algorithm, and data transfer between peers. Design and implementation of the simulator are presented in detail. Performance and memory efficiency of the simulator are discussed. Experiment results demonstrate that the simulator can model the internal behavior of the eMule network properly.

In this paper, a novel hybrid cascade asymmetrical multilevel converter is proposed. The novel converter is based on connection of multiple single-phase asymmetrical multilevel converter modules. The principle of the converter is analyzed. Subharmonic PWM method is employed in the topology. A two-module single-phase converter was constructed in the laboratory. Experimental results are presented to verify the proposed method.

In this paper, a novel asymmetrical multilevel converter is proposed which is composed a 3-level leg and a 2-level leg. The principle of the converter is analyzed. The new schema requires fixed insulated supplies instead of capacitors. Selective harmonic elimination method is used to eliminate the specified harmonics in the output voltage. Then the switching angles are computed to eliminate the low order harmonics in theory. A 6-level laboratory test verifies the proposed method.