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The harmonic had a bad influence on power quality on micro-grid, so it is very necessary to find an effective way to suppress the harmonic. New control method of three phase four wire active power filter (APF) is applied to suppress harmonic in micro-grid in this paper. Compared with traditional single methods, one cycle control method and improved space vector pulse width (SVPWM) method are combined, the new control method omitted the harmonic detection circuit, reduce the switching loss in certain degree and the utilization ratio of the DC side voltage is improved. The model of new control method of three phase four wire APF model and small independent micro-grid model are built. Then simulation analysis on small independent micro-grid harmonic suppression is made. Simulation results show that one cycle controlled three phase four wire APF has a good compensation effect in harmonic suppression on small independent micro-grid.

In the context of more massive data to be processed and more processing elements (PEs) to be laid on a single chip or board, the requirements for corresponding interconnection network are becoming even higher. This paper presents a new topology called xtorus, and evaluates it by using both theoretical analysis and experimental simulation method. For theoretical analysis, an algorithm for computing link path diversity and link entropy is given. The analysis shows that, compared with mesh, xmesh, and torus, the proposed topology has better properties in terms of diameter, average latency, throughput, and path diversity. Although some more links are added in xtorus, the number of links is of the same order of magnitude with that of mesh, xmesh, and torus. It also takes advantage of increasing higher levels of VLSI process. Simulations on GEM5 show that xtorus has better scalability, and its average latency is less than that of mesh, xmesh, and torus by significant proportions respectively, especially when larger number of routers are used. Moreover, to different traffic patterns, its performance swing is less than that of mesh. Finally, based on the entropy difference of the links in the topology, a method for heterogeneous link design is presented, which enables designers to trade off between delay, power and area according to concrete integrated circuit design scene.

Popek, Goldberg have done some research on the formal requirements for virtualizable third Generation Architectures. This paper discusses how to design Instruction Set Architectures (ISAs) that supporting virtualization. Firstly, it defines formally the concepts that concerns with the issue. Secondly, it reclassifies the instructions according to instruction behaviors. Thirdly, it discusses how to reduce the proportion of instructions that are executed with intervention and interpretation of Virtual Machine Monitor (VMM) in the entire instruction set so as to expand the efficiency space in further with the premise of the whole Machine Can be Virtualized(MCV). At last, it not only gives but proves a theorem about the mapping between any instruction sequences when VMM doesn't exist and its counterpart when VMM does exist. These not only provide guidelines for the design of ISA and the construction of efficient VMM, but also help to assess the existing ISA and make some necessary modification to enable MCV.