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This paper presents a comparative study between two input adapter circuits. The concepts are analysed based on input current consumption, fast propagation delay with low propagation distortion and input level hysteresis. The proposed methods were implemented in a standard 0.25µm BCD technology and the comparison was performed by means of simulations results and measurements.

This paper investigates the root cause of the latch on failure by a short turn-on input signal with a negative VS surge and proposes a new 1200 V HVIC with a high side edge trigger in order to solve the latch on failure. The proposed HVIC is fabricated using a 1.2 μm 1200 V BCDMOS process. The experimental results show the latch on failure no longer occurs on the new 1200 V HVIC because it doesn't overlap the VS recovery period and the RESET pulse period. The proposed HVIC can be applied to IPM modules (intelligent power modules) and APM modules (automotive power modules) which require a more robust HVIC solution.

This paper proposes an Under Voltage Lock Out (UVLO) with zero static power consumption Power-on Reset (POR) circuit in a High-Voltage Integrated Circuit (HVIC). The HVIC with the proposed UVLO and POR circuit is fabricated using a 1.2 μm 650 V BCDMOS process. Experimental results show that the UVLO with POR circuit consumes very low static power; 411 μW at 15 V power supply. Moreover, the newly designed POR circuit works nicely regardless of high-side floating power supply rise time. The proposed circuit has good performance in terms of high-peak pulsating noise immunity. Therefore, this design is suitable for embedding in an HVIC with an integrated bootstrap diode for low power motor application and intelligent power modules.