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The ultrathin integrated circuit (IC) chip ejecting and pick-up process plays an important role in advanced packages since the success ratio and productivity are determined by the delamination of chips from the adhesive tape substrate. As thinning of the IC chip occurs, chip cracking between the adhesive tape and ultrathin IC chip increases due to the low strength of the ultrathin IC chip in the die pick-up process. In this paper, the interfacial adhesion strength and energy release rate between an ultrathin IC chip and base tape were measured by a 90° peel test as a function of the peeling velocity. Also, an index was defined to characterize the competing fracture behavior between the delamination of the chip from the adhesive tape and chip cracking. Finite-element analysis of the die pick-up process with a virtual crack-closure technique was performed to predict stable peeling off of the chip with respect to the velocity of the chip holder as well as the pressure of the blown air considering the interfacial energy release rate and chip strength. The results show that the velocity of the chip holder and the pressure of the blown air should be lower than 50 mm/min and 90 kPa, respectively. [ABSTRACT FROM AUTHOR]

In this paper, the warpage simulation of a high-density multilayer printed circuit board (PCB) for solid-state disk drive (SSD) and microelectronic package was performed using the anisotropic viscoelastic shell modeling technique. The thermomechanical properties of various copper patterns were homogenized with the anisotropic shell model, which considered their viscoelastic properties. Then, warpage simulations of an SSD PCB unit/array and a full microelectronic package were performed; these simulations accounted for the initial warpage that occurred during fabrication using ABAQUS combined with a user-defined subroutine. Finally, it was demonstrated that both the maximum warpage and the remaining residual warpage of the full microelectronic package can be accurately predicted. [ABSTRACT FROM AUTHOR]