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A 232–250-GHz traveling-wave frequency doubler is presented using a 250-nm InP double heterodyne bipolar transistor (DHBT) technology. Compared to the previous traveling-wave structures, the proposed frequency doubler employs physical open at the end of the input feed line, thus minimizing the input signal leakage and avoiding the crossover of the output signal line. In addition, the output power is maximized by load–pull matching at the 2nd harmonic while the fundamental suppression is enhanced by phase compensation of the differential signal. The frequency doubler exhibits peak output power of 5.2 dBm at 240 GHz with a conversion gain of −4.3 dB and overall efficiency of 2.9%. The 3-dB bandwidth for output power is from 232 to 250 GHz. The fundamental suppression is 25 to 33 dB over the bandwidth. The chip size is as small as $443 \times536\,\,\mu \text{m}^{2}$ owing to the traveling-wave structure requiring no balun. [ABSTRACT FROM AUTHOR]

This article presents W- and G-band voltage-controlled oscillators (VCOs) fabricated in a 60 nm GaN high electron-mobility transistor (HEMT) process with ƒT/ƒMAX of 190/250 GHz. Two W-band fundamental VCOs (VCO1 and VCO2) are designed without and with a varactor, respectively. In addition, a G-band push–push VCO (VCO3) is designed to demonstrate feasibility of a GaN power source in the sub-terahertz band. The measurement shows that VCO1 and VCO2 exhibit output power of 22.5 and 22.6 dBm and dc-to-RF efficiency of 14.7% and 16.8% at 87.5 and 86.5 GHz, respectively. The power and efficiency are the highest values among the previously reported GaN VCOs operating beyond 50 GHz. Furthermore, VCO2 achieves a wide tuning range of 9.0 GHz (77.5–86.5 GHz). The VCO3 exhibits high output power of 9.3 dBm at 180.6 GHz. To the best of the authors’ knowledge, this is the first demonstration of a G-band VCO in a GaN technology. The W- and G-band VCOs occupy compact chip areas of 0.48 and 0.32 mm2, respectively. [ABSTRACT FROM AUTHOR]

Terahertz (THz) communication is a promising technique for chip-to-chip communication and wireless personal area networks. In this paper, we present an experimental study and design to realize such THz communication systems. We develop two different chip sets for on-off-keying (OOK) modulation based THz transceivers which include carrier generators, modulators, THz amplifiers, and baseband amplifiers. Specifically, the first chip set integrates the circuit blocks for the OOK modulation without the THz amplifier for short-range communication. In addition, the second chip set design includes the THz amplifier modules to extend the coverage of transmission. For these two chip sets, we experimentally demonstrate the feasibility of the wireless communication at THz frequency bands and assess performance using the bit error rate (BER) analysis. We estimate the BER by calculating the signal-to-noise ratio (SNR) based on the eye diagram and compare with actual BER measurements and Monte Carlo simulations. We also address the impact of the distance, the transmit power, and the data rate for the proposed THz transceivers based on the link budget analysis, and confirm the accuracy of the derived BER expression. [ABSTRACT FROM AUTHOR]

This letter presents a 300-GHz voltage-controlled oscillator (VCO) with high output power and efficiency. The VCO core employs a differential Colpitts topology with inductive degeneration to facilitate a fundamental oscillation at 300 GHz. A common-base output buffer regulates the output power to minimize the power variation during the frequency tuning. The 300-GHz VCO is fabricated in a 130-nm InP double heterojunction bipolar transistor (DHBT) technology. The VCO exhibits a measured frequency tuning range of 9.9 GHz (294.9–304.8 GHz). The peak output power is measured to be 4.7 dBm at 297 GHz. The dc power consumption is 75.6 mW, leading to a high dc-to-RF conversion efficiency of 3.9%. The VCO output power is maintained nearly constant with only a 0.3-dB variation over the entire frequency tuning range. The phase noise is −86.6 dBc/Hz at 10-MHz offset frequency. [ABSTRACT FROM AUTHOR]

This letter presents an injection-locked frequency octupler (ILFO) fabricated using a 100-nm GaAs pHEMT. A frequency quadrupler, followed by an injection-locked push–push oscillator, is employed to achieve a high multiplication factor of eight with a simple structure. Compared to conventional amplifier-multiplier chains, the proposed structure is advantageous for dc power and chip area consumption, phase noise, and circuit stability. The high multiplication factor allows the use of a low-frequency, high-performance, phase-locked-loop (PLL) as input. The ILFO achieves a locking range from 90.5 to 95.2 with 1-dBm input power. The output power is measured to be −0.4 dBm at 91.2 GHz. The phase-noise degradation from the input source to the output is 19.7 dB at 100-kHz offset. [ABSTRACT FROM AUTHOR]

This paper presents a 300-GHz voltage-controlled oscillator (VCO) with a wide frequency tuning range and high output power. To generate fundamental oscillation at 300 GHz, a cascode cross-coupled pair is employed as a VCO core instead of a conventional common-emitter pair. Capacitive emitter degeneration is added to the VCO core to achieve a wide bandwidth of a negative conductance. In addition, the phase of the oscillation feedback loop is analyzed and optimized to further extend the tuning range. The VCO is fabricated in a 0.25- $\mu \text{m}$ InP DHBT technology ($f_{\mathrm {T}}/f_{\mathrm {max}} = 392$ /859 GHz). Measurements show that the VCO frequency is tuned from 272.4 to 310.8 GHz with a peak output power of 1.5 dBm. To the best of authors’ knowledge, this is the widest tuning range of 38.4 GHz (a fractional bandwidth of 13.2%) among the reported fundamental VCOs at the WR-3 band. [ABSTRACT FROM AUTHOR]

This paper presents two D-band amplifiers fabricated in a 0.18- \mu\textm SiGe heterojunction bipolar transistor process. A single-ended amplifier employs a five-stage common-base topology, and a differential amplifier combines two of the single-ended chains. To overcome the limited available gain of the given technology at D-band, a gain-boosting technique based on positive feedback is adopted for each gain cell. In addition, the input and output impedances of the gain cell are conjugate-matched by adjusting the positive feedback; thus, no external components are needed for interstage matching. This improves the gain and bandwidth while minimizing the chip size. The single-ended amplifier exhibits a measured gain of 7.5 dB at 123 GHz with a 3-dB bandwidth of 25 GHz. The differential amplifier shows a measured gain of 20.3 dB at 115 GHz with a 3-dB bandwidth of 13 GHz. The output power values of the two amplifiers are 2.6 and 6.7 dBm, respectively. The chip sizes are small at 0.22 and 0.40 mm2 , respectively. [ABSTRACT FROM PUBLISHER]