1. An architecture for affine motion estimation in real-time video coding
- Author
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D. Ghosh, A. Girotra, I. Chakrabarti, and Sumit Johar
- Subjects
Computer Science::Hardware Architecture ,Motion compensation ,Rate–distortion optimization ,Computer science ,Video tracking ,Motion estimation ,Real-time computing ,Memory architecture ,Multiview Video Coding ,Block-matching algorithm ,Quarter-pixel motion - Abstract
With the ever-increasing demand for real-time video applications, a dedicated and efficient architecture for motion estimation has become a necessity. In this paper, we present an architecture for affine motion estimation which meets the real-time application requirements. The architecture employs a modular memory structure for efficient pipelined parallel implementation of affine motion estimation using the one-dimensional hierarchical search (IDHS) algorithm. Implementation results in terms of the number of clock cycles and PSNR values demonstrate the efficiency of the proposed architecture.
- Published
- 2004
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