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This brief presents a nano-ampere CMOS current reference (CCR) for low power application with a wide temperature range from −40°C to 120°C. The current reference is generated by the division of a temperature-independent voltage and resistance in a simple way. The low temperature-independent voltage is generated based on the threshold voltage difference between two same-type NMOS transistors with different channel lengths working in the subthreshold region, while the temperature-independent resistance is made up by two poly resistors, whose temperature coefficients are opposite. By designing a low voltage to allow for a small resistance, the CCR circuit takes a small chip area while generating nano-ampere current. The proposed CCR circuit was implemented in a standard 0.18- ${\mu }\text{m}$ CMOS process and its active area is 0.054 mm2. Among the measured 10 samples, the average output current is 11.6 nA and the average temperature coefficient is 169 ppm/°C. [ABSTRACT FROM AUTHOR]

A 30-MHz voltage-mode buck converter using a delay-line-based pulse-width-modulation controller is proposed in this brief. Two voltage-to-delay cells are used to convert the voltage difference to delay-time difference. A charge pump is used to charge or discharge the loop filter, depending on whether the feedback voltage is larger or smaller than the reference voltage. A delay-line-based voltage-to-duty-cycle (V2D) controller is used to replace the classical ramp-comparator-based V2D controller to achieve wide duty cycle. A type-II compensator is implemented in this design with a capacitor and resistor in the loop filter. The prototype buck converter was fabricated using a 0.18- ${\mu }\text{m}$ CMOS process. It occupies an active area of 0.834 mm2 including the testing PADs. The tunable duty cycle ranges from 11.9%–86.3%, corresponding to 0.4 V–2.8 V output voltage with 3.3 V input. With a step of 400 mA in the load current, the settling time is around 3 ${\mu }\text{s}$. The peak efficiency is as high as 90.2% with 2.4 V output and the maximum load current is 800 mA. [ABSTRACT FROM AUTHOR]

This paper presents a CMOS smart temperature sensor using a switched Vernier time-to-digital converter to achieve an energy-efficient temperature sensing. The proposed temperature sensor employs two switched ring oscillators (SROs), of which the oscillation frequencies are slightly different from each other and varying linearly with temperature due to the deployment of a proportional-to-absolute-temperature current generator. The frequencies of the two SROs are measured by counting the rising edges with two counters, and hence, the frequency difference corresponding to temperature can be readily monitored with the digital numbers. A control strategy that switches OFF the ring oscillators after each sampling is developed, such that significant power saving is achieved. The proposed temperature sensor shows a measured resolution of 0.048 °C from −20 °C to 120 °C with 100-ms conversation time. With 1-kHz sampling rate, the power consumption is as small as 93.6 \mu \textW , resulting in 93.6 nJ per sampling. The chip area is 0.118 mm2 in a standard 0.18- \mu \textm CMOS process. [ABSTRACT FROM PUBLISHER]