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A novel adaptive heart rate monitoring and filtering system based on algebraic distance minimization has been designed. This system uses frequency-modulated continuous-wave radar for non-contact monitoring of parameters such as respiration, heart rate, and heart rate variability (HRV). By employing an improved algebraic distance minimization technique, the system suppresses static noise from the environment, enhances the signal-to-noise ratio of the intermediate-frequency signal, and reduces the complexity of subsequent signal processing. To address issues such as low-frequency interference from radar signals reflecting off fixed targets around the subject and the impact of respiratory harmonics on heart rate measurement, this study introduces a respiratory harmonic filter and an adaptive notch filter to eliminate higher-order respiratory harmonic interference. This approach allows for the adaptive decomposition and reconstruction of vital sign signals and final estimation of respiratory heart rate based on the relationship between harmonics. Comparative experiments with intensive care unit medical equipment have validated the superiority and robustness of the proposed algorithm. Experimental results show that the RMSE and MRE of the method are 2.66% and 2.7%, respectively. After multiple measurements across various subjects, the method achieved an average accuracy of 96.5%, demonstrating higher measurement accuracy than other methods in all cases. Additionally, the algorithm also enables the detection of heart rate variability.

In this paper, a novel integrated SHE-NLC control is proposed for the mitigation of unwanted lower-order harmonics in the cascaded H-bridge multilevel inverter. The proposed algorithm has been developed by hybridizing the NLC and SHE methods, in an attempt to keep the merits of both the individual control. The switching angles and nearest levels are calculated by applying the Genetic Algorithm (GA). The proposed technique reduces the calculation time and implementation complexity, thus can be a viable alternative to the real time implementation for SHE. Integrated NLC-SHE control is tested by varying the modulation index and load dynamics. This technique resulted in the reduction in Total Harmonic Distortion (THDs) in load voltage and current. Comparative analysis of NLC, SHE and Integrated NLC-SHE technique is also performed on the CHB nine-level inverter. There is significant reduction in voltage and current THD values and power losses. Efficiency of the inverter is increased. The efficacy of the proposed control CHB nine-level is tested on MATLAB Simulink environment and further validated by experimental results.

This article proposes a decoupled control scheme for the modular multilevel converter (MMC) to reduce the total harmonic distortion (THD) and eliminate one specific harmonic. First, to realize the decoupled control between the ac and dc paths of the MMC, an improved nearest level control (INLC) method is proposed. It applies the round function to generate the ac output voltage levels, instead of the arm output voltage levels. Thus, a staircase wave is generated by the INLC method. Then, by adding an additional pulse to each quarter of the staircase wave, one specific harmonic can be eliminated without optimizing each conduction angle. Furthermore, a decoupled circulating current fuzzy control method is proposed to suppress the second-order harmonic and balance the arm energy. By this decoupled control structure, the output voltage and the circulating current can be controlled independently. Taking the fifth-order harmonic as an example, simulation and experimental results validate that the proposed scheme can simultaneously realize THD reduction and one specific harmonic elimination in the MMC output voltage. [ABSTRACT FROM AUTHOR]

The interphase reactor (IPR) is one of the most important components of the passive harmonic reduction circuit (HRC), and the optimum turns ratio design of the IPR is of great significance to ensure the effect of the passive HRC. In combination with the pulse number multiplication methods, the configuration of the multipulse rectifiers (MPRs) with single/dual/triple-passive HRCs are constructed, respectively. The general optimum turns ratio design method for the IPRs is proposed, which contains most of the realizable combinations of the HRCs. The relationship between the turns ratio of the IPR and the phase number of the bridge rectifier in the main circuit is established, the influence of the turns ratio selection on the power quality of the MPRs is presented. In addition, this article takes N equal to five as an example to verify the effectiveness of the proposed general optimum turns ratio design method of IPR. The power quality of the MPRs with different HRCs or phase number are compared. All the research can provide a useful guideline and theoretical foundation for the MPR selection and the HRC design under the specific occasions. [ABSTRACT FROM AUTHOR]

In order to eliminate the harmonics of the grid connected inverters accurate harmonic detection is essential. Though there are many kinds of different harmonic detection methods are available, it can hardly be achieved without the help of grid frequency detection of the fundamental component. In this paper a novel Lock-In Amplifier based Frequency Locked Loop (LIA-FLL) is proposed for the improved harmonic elimination of the grid-connected three phase inverters. Due to the outstanding performance of the LIA-FLL, the harmonics can be detected and compensated accurately under the grid frequency variation. To demonstrate the superiority of the proposed method, it is applied to a 10 kW three phase grid connected inverters. The results obtained by the proposed method are compared with those obtained by the harmonic elimination method with no FLL. The principle of LIA-FLL is discussed and its performance for the harmonic elimination is proved by the simulation and experiments with a 10KW three phase grid connected inverter under the highly polluted grid condition.

Steel production worldwide continues to grow and, consequently, also the energy consumption of the steel sector. With the applications of the electric arc furnace route in the steelmaking process, the concern with aspects of power quality and overload of the transmission grid lines increases. This work presents the zero harmonic distortion (ZHD) converter static synchronous compensator (STATCOM), which makes it possible to increase the displacement power factor of an electric arc furnace (EAF) application from 0.88 to 0.98 with total demand distortion in the grid around 1.44% with the ZHD prototype operation, this being accomplished without using high-order sinusoidal filters and with consolidated components in the industry. [ABSTRACT FROM AUTHOR]

When suffering the grid voltage distortion, the phase-locked loop (PLL) should equip with the fast response filter to precisely extract the fundamental voltage information for proper grid integration. To shorten the time delay induced by filters, this article proposes a new three-sample filter (TSF) to fast eliminate the harmonics of sampled grid voltage. Theoretically, it can filter out arbitrary individual harmonic with short time delay which could be as small as only two sampling periods. Moreover, TSF can reject a group of harmonics simultaneously within the specifically set time interval. The implementation issues of TSF as in-loop filter or prefilter for both three- and single-phase applications are demonstrated in synchronous reference frame PLL (SRF-PLL) SRF-PLL. Simulation and experimental results verified its advanced performance. [ABSTRACT FROM AUTHOR]

Modulation using a higher sided polygonal space vector structure (SVS) is an elegant method to increase the linear modulation range and to eliminate the undesired lower order harmonics from motor phase voltage. This article presents the generation of a dense 15-concentric 30-sided multilevel SVS using a single dc-link for an open end induction motor (OEIM) drive. The proposed scheme eliminates lower order harmonics till 25th order from motor phase voltage throughout the modulation range. The $dv/dt$ stress in the phase voltage applied to the motor will also be highly reduced owing to the multilevel structure. The pulsewidth modulation scheme employed utilizes the denseness of SVS and avoids iterative searches to find the triangle, which encompasses the tip of reference voltage vector, which are typical in multilevel polygonal SVS. The topology consists of an active dc-link fed three-level primary inverter and a capacitor fed five-level secondary inverter connected to either end of an OEIM. The primary inverter acts as the active power supplier for the drive and the secondary inverter filters out the undesirable lower order harmonics from motor phase voltage. The proposed scheme is experientially validated and the results are included in this article. [ABSTRACT FROM AUTHOR]

The dynamics of a machine tool have an important influence on the quality and efficiency of the machining process. In this paper, the modal parameters identification method of machine tools under normal cutting excitation is proposed based on the fact that the random components in the cutting force can provide an effective excitation. However, the generated cutting force during machining contains strong periodic components and does not satisfy the white noise assumption. Directly applying the operational modal analysis (OMA) method will face serious harmonic interference. Therefore, it is difficult to ensure the accuracy of the identified parameters. The cepstrum editing method is proposed to eliminate the periodic component. And the modal parameters are extracted from the remaining signal by using the OMA method. The experimental results show that the proposed method works well under normal cutting conditions.

This work introduces a 49-level Asymmetrical Inverter (AMLI) with boosted output based on the cascaded operation of two 7-Level Modified Packed U-Cell inverters (MPUC-7). The converter is capable of operation with a boosted voltage of up to 1.714 times the maximum DC voltage employed. It requires only 12 active switches and 4 voltage sources. With the sources set in the ratio of 14:7:2:1, the 7-level output of the two converters is so utilized that the 72 = 49-level output voltage is generated across the load. A detailed explanation of level formation is discussed. This converter is operated using an Artificial Neural Network (ANN) which is trained for the harmonic elimination in the output voltage waveform. For the calculation of optimum angles, a meta-heuristic based Genetic Algorithm (GA) technique is employed. The generation of 49-level output requires 24 transitions in one quarter of a cycle. All these angles are generated for various desired output voltages, and the ANN is trained offline for the same. The converter and its control are simulated in MATLAB/Simulink® environment, and the results are verified on the experimental setup. The multilevel output thus obtained is nearly sinusoidal and the Total Harmonic Distortion (THD) thus produced is under the specified limit of IEEE.

A novel space vector-based approach is introduced in this brief to selectively eliminate the lower order harmonics from the DC-AC converter output waveform by making use of double switching clamping sequences. This technique uses a volt-second balance for control of fundamental voltage while using the dwell time rearrangement of the active vector in a sub-cycle to obtain the elimination of fifth or seventh harmonics. Further, the closed-form expression of the dwell time-division coefficient (DTDC) for the active vector dwell time division rearrangement is expressed. The proposed PWM technique is compared with other space vector-based PWM techniques in terms of voltage weighted total harmonic distortion, switching power loss, and lower order harmonic magnitudes. Further, the experimental results are presented to show the effectiveness of the proposed PWM techniques in terms of harmonic elimination. [ABSTRACT FROM AUTHOR]

Decaying DC (DDC) current due to impact loads causes detrimental consequences in weak grids. In this paper, the active power filter (APF) is enhanced to simultaneously compensate for the undesired harmonics, negative sequence components and the DDC component in the event of a transient. To this end, first, a novel DDC component detection method is mathematically deduced for single-phase transient current, followed by its extension to the three-phase system. With respect to existing techniques, the proposed method has a significantly reduced detection time from 1 grid cycle to approximately 0.5 grid cycle. By further exploiting the transient signal properties in dq-frame, the three-phase fundamental-frequency current in positive sequence can be separated. Finally, the enhanced APF control scheme is developed based on the proposed detection algorithm. Experiments verified the effectiveness and advancement of the proposed technique. [ABSTRACT FROM AUTHOR]

Active power filters are conventionally utilized to compensate steady-state harmonic currents and reactive power in the utility, yet their capabilities are usually limited if the elimination of undesirable effects associated with decaying dc components during transients is the target, especially under the weak grid condition. In this letter, active cancellation of the typical first-order decaying dc-mode transients is explored. To this end, a real-time detection algorithm of decaying dc component is first developed for a generic single-phase distorted ac signal. Furthermore, fast and robust elimination of both decaying dc transient and harmonics can be performed simultaneously in three-phase grids, by adoption of moving average filters in $d$ – $q$ frame and subsequent calculations. Hardware-in-the-loop experiment results verified the effectiveness of the proposed technique. [ABSTRACT FROM AUTHOR]

This article proposes a modified grey wolf optimization (MGWO) which has improved rate of convergence and avoids local optima stagnation. This is achieved by improving the exploration–exploitation balance in conventional grey wolf optimization (GWO). Moreover, the use of weighted-distance strategy allows quick identification of the global optima in the proposed MGWO. This optimization is then applied for the control of a three-phase, 11-level hybrid cascaded multilevel inverter (HC-MLI). Selective harmonic elimination pulsewidth modulation technique is implemented through MGWO which generates optimal switching angles for the HC-MLI so as to eliminate lower order harmonics such as 5th, 7th, 11th, and 13th from the output voltage. In MGWO optimized HC-MLI, balancing of capacitor voltage is made possible at higher modulation index by making use of the available redundant switching states. The performance of the proposed work is validated through simulation and experimentation on a 1.5 kW prototype. The results obtained through simulation show that the MGWO algorithm is more efficient and accurate than other reported algorithms such as GWO, genetic algorithm, and particle swarm optimization in terms of performance, harmonic reduction, and convergence rate. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a modified particle swarm optimization (MPSO) for fast convergence and harmonic minimization in three-phase eleven-level hybrid cascaded multilevel inverter (HC-MLI). Selective harmonic elimination pulsewidth modulation (SHE-PWM) technique implemented through MPSO has been used in the proposed work for synthesizing an eleven-level output voltage using two dc sources, a precharged capacitor, and twelve switches. The switching angles of the three-phase eleven-level HC-MLI has been computed for eliminating specified lower order odd harmonics such as 5th, 7th, 11th, and 13th from the output voltage of the HC-MLI. In the proposed MPSO optimized HC-MLI, capacitor voltage balance is also ensured even at higher modulation indices by utilizing the redundant switching states available at different switching instances of the HC-MLI. The performance of the MPSO optimized three-phase eleven-level HC-MLI has been verified through simulation and experimentation on a 1.5-kW prototype using closed-loop control. The results obtained through MPSO are compared with the results obtained through genetic algorithm (GA) and particle swarm optimization (PSO) in terms of convergence rate and harmonic content. It has been found that MPSO gives improved results in comparison to GA and PSO. [ABSTRACT FROM AUTHOR]

A 12-pulse converter has been commonly used for a large-scale power generating system. The arrangement of a delta–delta (Δ–Δ) and a delta–wye (Δ–Y) phase-shift transformer pair in series with the voltage source eliminates undesirable harmonics from nonlinear loads. Recently, a novel front-end for a multi-generator power system was proposed, which utilizes a single Y–Δ transformer to shunt between the two 30° phase-shifted generator outputs and results in the comparable harmonic elimination performance to the conventional 12-pulse rectifier. The shunt-type Y–Δ transformer front-end achieves more than 75% transformer size reduction, making it extremely attractive to large-scale industrial and shipboard applications. However, the exact 30° phase shift between the two rotating generators can drift in a practical system, especially under dynamic conditions. The harmonic performance under the non-ideal 30° phase-shift condition can deteriorate with the Y–Δ shunt-type front-end. To understand the impact of non-ideal phase-shifted generator sources, this paper derives the mathematical models through the use of an equivalent circuit, a square-wave analysis, and the phasor representation to show the harmonic cancellation principle and verifies the results with the computer simulation. [ABSTRACT FROM AUTHOR]

This paper presents a novel multilevel radio frequency (RF) pulsewidth modulation (PWM) method for all-digital transmitters (ADTx) that actively eliminates the selected harmonics of RF-PWM. Compared with existing multilevel RF-PWM techniques, this method uses several adaptive thresholds and controls the pulsewidth of the corresponding subpulses to make the selected harmonics cancel each other out and keep the fundamental frequency component proportional to input envelope. For the third-harmonic elimination, the corresponding five-level RF-PWM scheme presented in this paper shows that it can significantly relax the filtering requirements and improve the wideband performance of the ADTx. The proposed scheme is verified by extensive simulations and offline measurements. The simulations show good potential for high-frequency operation up to gigahertz ADTx. The measured results show that the third-harmonic suppression of the proposed scheme has increased with the decreasing of the time resolution for digital implementations. For a 3.80-dB peak-to-average power ratio (PAPR) QPSK signal and a 6.04-dB PAPR 16QAM signal at 200-MHz carrier, the proposed scheme can achieve above −51- and −48-dBc third-harmonic suppression, respectively, when the time resolution is 50 ps and relative time resolution is 1%, and improves above 30 dBc to the existing schemes. [ABSTRACT FROM AUTHOR]

Conventional voltage-source inverters used for induction motor drives generate a hexagonal space vector structure. In the overmodulation range, the hexagonal space vector structure generates low-order harmonics in the phase voltage resulting in low-order torque ripple in the motor. Inverter topologies with an octadecagonal (18 sided) space vector structure eliminate fifth-, seventh-, eleventh-, and thirteenth-order harmonics from the phase voltage, and hence, the dominant sixth- and twelfth-order torque ripple generation is eliminated. Octadecagonal space vector structures proposed in the past require multiple dc sources, which makes four-quadrant operation of the drive system difficult and costly. In this paper, the formation of a multilevel nine-concentric octadecagonal space vector structure using a single dc source is proposed. Detailed experimental results, using open-loop $V/f$ control and rotor field-oriented control, are presented to validate the effectiveness of the proposed drive scheme. [ABSTRACT FROM PUBLISHER]

In this letter, the five-level packed U-cell (PUC5) inverter is reconfigured with two identical dc links operating as an active power filter (APF). Generally, the peak voltage of an APF should be greater than the ac voltage at the point-of-common coupling (PCC) to ensure the boost operation of the converter in order to inject harmonic current into the system effectively; therefore, full compensation can be obtained. The proposed modified PUC5 (MPUC5) converter has two equally regulated separated dc links, which can operate at no load condition useful for APF application. Those divided dc terminals amplitudes are added at the input of the MPUC5 converter to generate a boosted voltage that is higher than the PCC voltage. Consequently, the reduced dc-links voltages are achieved since they do not individually need to be higher than the PCC voltage due to the mentioned fact that their summation has to be higher than PCC voltage. The voltage balancing unit is integrated into the modulation technique to be decoupled from the APF controller. The proposed APF is practically tested to validate its good dynamic performance in harmonic elimination, ac-side power factor correction, reactive power compensation, and power quality improvement. [ABSTRACT FROM AUTHOR]

In this paper, an electronic phase-shifting strategy has been optimized for a multiparallel configuration of line-commutated rectifiers with a common dc-bus voltage used in motor drive application. This feature makes the performance of the system independent of the load profile and maximizes its harmonic reduction ability. In order to further reduce the generated low-order harmonics, a dc-link current modulation scheme and its phase-shift values of multidrive systems have been optimized. Analysis, simulations, and experiments have been carried out to verify the proposed method. [ABSTRACT FROM PUBLISHER]

Wide bandgap semiconductor switches have been increasingly utilized to improve the power density and efficiency of power converters, as such devices are able to operate at very high frequencies, e.g., up to 100 MHz, with reduced power losses. However, such a high-frequency operation may impose a challenge to the digital control system, and the system clock frequency should be up to 100 GHz in high-precision applications, which is difficult to realize in low-cost microprocessors. Instead of using extremely high-frequency clocks, preprocessing-based solutions that utilize digital pulse-width-modulated (DPWM) dither techniques can also enhance the DPWM resolution with moderate frequency clocks. Unfortunately, this is usually achieved at the expense of introducing low-frequency harmonics, which may complicate system controller and output filter design. In this paper, an optimal dither technique is proposed to enhance the resolution of DPWM power converters. The concepts of positive dither and negative dither are first proposed in this paper. Furthermore, vector-diagram-based analysis indicates that with proper utilization of positive dithers and negative dithers and carefully selected dither sequences, the lowest order harmonic introduced by the conventional dither technique can be completely eliminated when the dither period is multiples of six switching periods. In other cases, the proposed optimal dither technique can produce minimized lowest order harmonic. Finally, experimental results obtained from a Gallium Nitride (GaN) devices-based synchronous buck converter validate the feasibility of the proposed dither technique. [ABSTRACT FROM PUBLISHER]

In conventional HVDC systems where the harmonic filters and shunt capacitors are installed at the ac grid side, the converter transformers inevitably suffer the detrimental impacts caused by harmonic penetration. In this paper, combined with an inductive filtering method, a parallel delta-connected filtering-winding scheme for 12-pulse converter transformer units is proposed to reduce the harmonic currents flowing through the transformers and, thus, to attenuate the harmonic effects on them. This paper describes the presented transformer configuration in terms of the wiring scheme of the 12-pulse converter transformer unit and corresponding flowing paths of different harmonic currents with the orders of 3,6n\pm 1\left(\mathrmn=1,3,5,\ldots \right), 11 and 13 in the filtering winding circuit. Then, the mechanism of the proposed scheme on harmonic suppression to the converter transformers is explained theoretically. In an attempt to validate the theoretical analysis, simulations based on PSCAD/EMTDC and experiments in a laboratory prototype system are performed to evaluate the harmonic eliminating performance of the proposed scheme. [ABSTRACT FROM PUBLISHER]

In this paper, a novel rectifier transformer that has a round-shaped structure is investigated. The transformer can convert three-phase power into 12-phase, which supplies to a rectifier composed by four bridges for producing dc voltage with 24-pulse. With such transformers, rectifier performance can be improved in both input and output waveforms. The principle of harmonics elimination is explained and some critical problems may be encountered in design are discussed. The experiments on the prototype are carried out for performance assessments regarding characteristics, such as ripple factor, total harmonic distortion, efficiency, etc. The results demonstrated the effectiveness of the novel transformer in harmonics mitigation. [ABSTRACT FROM AUTHOR]

This paper presents a technique for reducing the input current ripple on multiphase power converters that provide multiple heterogeneous power supply rails, such as those present in portable electronics and computers. Through asymmetric interleaving of individual phases, the input current ripple can be reduced compared to conventional interleaving. The technique is derived based on an analytic description of the relevant current waveforms. Practical requirements of a digital control implementation of the proposed technique are analyzed, and its possible performance improvement is quantified through simulations and experimental results. With the proposed technique, close to a 3x reduction in input current ripple, compared to conventional methods, is demonstrated using an experimental prototype comprising a microcontroller that controls a multiphase 180 nm CMOS power management IC. [ABSTRACT FROM AUTHOR]

This paper presents a method for generating a multilevel dodecagonal voltage space vector structure using a single dc source for induction motor drives. Multilevel dodecagonal structure combines the advantages of both multilevel and dodecagonal structures, and hence, generates low dv/dt phase voltage along with the elimination of fifth- and seventh-order harmonics over the entire modulation range. This eliminates low-order harmonic currents and prevents the generation of sixth-order torque ripple in the motor. The topology used requires only one dc source making four-quadrant operation of the drive system simpler compared to previously proposed multilevel topologies generating dodecagonal space vector structures. The topology used consists of a three-level flying capacitor (FC) inverter cascaded with a capacitor fed H-bridge. The FC inverter operates at a lower switching frequency and the low-order harmonics are eliminated by the switching action of the cascaded H-bridge inverter. The capacitors in the cascaded H-bridge modules are maintained at a substantially smaller voltage compared to the dc-link voltage and are inherently balanced during the pulsewidth modulation operation. This results in low switching loss, in the FC inverter as well as in the cascaded H-bridge inverter. Experimental results are included to validate the operation of the topology and modulation scheme presented in this paper. [ABSTRACT FROM AUTHOR]

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme. [ABSTRACT FROM PUBLISHER]

Symmetric multiphase dc–dc converters are widely used in power electronics, as they enable the processing of high power through splitting the overall load-current into multiple phases. Distributing the processed power symmetrically between the phases and performing ripple minimization through interleaving is well understood. However, in recent applications such as maximum power point tracking for solar photovoltaic, converters are forced to operate under asymmetric conditions, due to differences in the sources or loads of each converter. This study presents a control technique, based on harmonic elimination, that allows for ripple minimization under asymmetric conditions. The mathematical derivations are outlined and simulations are used to evaluate the performance of the proposed technique. Measurements taken from an experimental prototype, consisting of three dc–dc buck converters, demonstrate significant improvements in ripple reduction over conventional interleaving techniques. When the multiphase converter is operated at the optimum asymmetric phase-shift found through the techniques presented here, a more than 3x reduction in net current ripple is observed under realistic operating conditions. Additionally, the undesirable first harmonic ripple component is reduced by 14.8 dB with the proposed technique. [ABSTRACT FROM AUTHOR]

When one of the input terminals of multipulse rectifier (MPR)is open, MPR operates under single-phasing. This paper analyzes the effect of single-phasing on MPR with active interphase reactor (AIPR). The output voltages of phase shift transformer and the voltage across the secondary winding are calculated under single-phasing. Compared with the voltages under normal operation, the amplitude of ouput voltages are not equal to each other under single-phasing, and phase difference of arbitrary two phases are not equal to 120°. The MPR with AIPR is equivalent to two single-phase full-bridge rectifiers operating in parallel. Zero-phase difference of output voltages of the two bridge rectifiers leads to no harmonic power being absorbed by the AIPR. Some simulation and experiment are carried out to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

The extensive use of pulse width modulation control technology in smart grid will lead to prominent enlargement of high-frequency harmonics. The effects of the distributed capacitances of transmission line and transformer that are neglected previously will be very obvious. The performance of the traditional harmonic eliminating method for wideband harmonic is limited, which will lead to huge challenge to the analysis, evaluation, and elimination of harmonics as well as series and parallel resonance problem. In this paper, to accurately describe the influence of wideband harmonic on smart grid, the multiterminal analysis model of harmonic degradation in smart grid is established, especially the distributed capacitances of the transmission line and the transformer are considered. Then, a novel topology of hybrid active power filter (HAPF) for resonance damping and multitype harmonic eliminating is proposed. The resonance damping model of the new topology is established; analysis results indicate that the proposed HAPF has a good harmonic resonance damping characteristic. Both simulation and experimental results have validated the validity of the theoretical analysis in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a multilevel inverter topology suitable for the generation of dodecagonal space vectors instead of hexagonal space vectors as in the case of conventional schemes. This feature eliminates all the 6n ± 1 (n = odd ) harmonics from the phase voltages and currents in the entire modulation range with an increase in the linear modulation range. The topology is realized by flying capacitor-based three-level inverters feeding from two ends of an open-end winding induction motor with asymmetric dc links. The flying capacitor voltages are tightly controlled throughout the modulation range using redundant switching states for any load power factor. A simple and fast carrier-based space-vector pulsewidth modulation (PWM) scheme is also proposed for the topology which utilizes only the sampled amplitudes of the reference wave for the PWM timing computation. [ABSTRACT FROM AUTHOR]

This paper presents the Bee optimization method for harmonic elimination in a cascaded multilevel inverter. The main objective in selective harmonic elimination pulsewidth modulation strategy is eliminating low-order harmonics by solving nonlinear equations, while the fundamental component is satisfied. In this paper, the Bee algorithm (BA) is applied to a 7-level inverter for solving the equations. The algorithm is based on the food foraging behavior of a swarm of a honeybees and it performs a neighborhood search combined with a random search. This method has higher precision and probability of convergence than the genetic algorithm (GA). MATLAB software is used for optimization and comparison of GA and BA. Simulation results show superiority of BA over GA in attaining accurate global minima and higher convergence rate. Also, its performance in 10 times run is the same as in 1 time run. Finally, for verifying purposes, an experimental study is performed. [ABSTRACT FROM AUTHOR]

In this paper, a real-time circulating current reduction method for parallel harmonic-elimination pulsewidth modulation (HEPWM) inverters is proposed. HEPWM techniques are often used in high-capacity inverters. For instance, in a hybrid microgrid, the inverters are employed to transfer power between the dc and ac buses. If the inverters are in parallel operation, the zero-sequence path can be established, and the zero-sequence circulating current will circulate among the inverters. The proposed method installs a cascade null-vector control system behind the conventional three-phase HEPWM modulator. The proposed null-vector control system can be disabled to save switching losses when the zero-sequence circulating current is small, whereas it can be enabled when the zero-sequence circulating current becomes large. The proposed method does not affect the line-to-line voltage waveforms of HEPWM inverters, and it can easily enable/disable the null-vector control system to provide bumpless transfer. Compared with the conventional HEPWM with zero-sequence harmonics elimination, the proposed method can provide an extra 15% modulation index range. Results that were obtained from both simulation and experiments confirmed the performance and effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Multilevel power electronic converters have gained popularity in high-power applications due to their lower switch voltage stress and modularity. Cascaded H-bridge converters are a promising breed of multilevel converters which generally require several separate dc voltage sources. By utilizing the redundant switching states, it is possible to replace the separate dc voltage sources with capacitors and keep only the one with the highest voltage level. Redundancy in the charge and discharge modes of the capacitors is assumed to be adequate for their voltage regulation. However, the effects of the output current of the converter as well as the time duration of the redundant switching states have been neglected. In this paper, the impacts of the connected load to the cascaded H-bridge converter as well as the switching angles on the voltage regulation of the capacitors are studied. This paper proves that voltage regulation is only attainable in a much limited operating conditions that it was originally reported. In addition, based on the analysis of the converter, a simplified formula is found which can be used to find those modulation indices that regulate the voltage of the capacitor. This formula can be used in harmonic minimization problems while capacitor voltage regulation is ensured. Simulation and laboratory results are provided to confirm the analysis. [ABSTRACT FROM PUBLISHER]

This work approximates the selective harmonic elimination problem using artificial neural networks (ANNs) to generate the switching angles in an 11-level full-bridge cascade inverter powered by five varying dc input sources. Each of the five full bridges of the cascade inverter was connected to a separate 195-W solar panel. The angles were chosen such that the fundamental was kept constant and the low-order harmonics were minimized or eliminated. A nondeterministic method is used to solve the system for the angles and to obtain the data set for the ANN training. The method also provides a set of acceptable solutions in the space where solutions do not exist by analytical methods. The trained ANN is a suitable tool that brings a small generalization effect on the angles' precision and is able to perform in real time (50-/60-Hz time window). [ABSTRACT FROM AUTHOR]

This paper presents the control of distribution static synchronous compensator (DSTATCOM) for reactive power, harmonics and unbalanced load current compensation of a diesel generator set for an isolated system. The control of DSTATCOM is achieved using least mean square-based adaptive linear element (Adaline). An Adaline is used to extract balanced positive-sequence real fundamental frequency component of the load current and a proportional–integral (PI) controller is used to maintain a constant voltage at the dc-bus of a voltage-source converter (VSC) working as a DSTATCOM. Switching of VSC is achieved by controlling source currents to follow reference currents using hysteresis-based PWM control. This scheme is simulated under MATLAB environment using Simulink and PSB block-set toolboxes for feeding linear and nonlinear loads. The modeling is performed for a three-phase, three-wire star-connected synchronous generator coupled to a diesel engine, along with the three-leg VSC working as a DSTATCOM. Results are presented to verify the effectiveness of the control of DSTATCOM for the load compensation and an optimal operation of the DG set. [ABSTRACT FROM AUTHOR]