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For realizing high-performance Ge-channel metal-oxide-semiconductor field-effect transistor (MOSFET), the reduction of parasitic resistance is one of the most important issues [1] . However, it is generally difficult to reduce the contact resistivity at metal/ n -Ge interface because of its high Schottky barrier height (SBH) around 0.5–0.6 eV, in which the Fermi level of the metal is pinned at the valence band edge of Ge; well-known Fermi level pinning (FLP) phenomenon [2] , [3] . One of the considerable reasons for FLP is disorder-induced gap states owing to dangling bonds at the metal/Ge interface [4] . There are some reports in which an epitaxial metal/Ge interface alleviates FLP and the SBH can be lowered with Fe 3 Si/ n -Ge(111) [5] , Mn 3 Ge 5 / n -Ge(111) [6] , and NiGe/ n -Ge(110) contacts [7] .

We propose the first multiphase TCAD cobalt germanide growth model that can predict the resulting phase based on germanidation time, temperature, and ambient. The model has been calibrated to experimental results reported in the literature as well as our own data. This model can help in the design of cobalt germanide contacts with low resistance.

Germanium (Ge) is a promising candidate semiconductor for channel material of low power consumption and high performance field-effect transistors (FETs) alternative to silicon because of high hole and electron mobilities and good process affinity of Ge for the integration on Si nanoelectronics. One of serious issues of Ge for the practical FET application is a high parasitic resistance at metal/n-type Ge (n-Ge) contact since its high contact resistivity owing to a high Schottky barrier height (SBH) of metal/n-Ge interface around 0.5–0.6 eV [1,2].

Contact engineering of Ge-rich source/drain is of critical importance for the development of advanced nano-scale CMOS technology nodes. Germanosilicide or Germanide contacts with low Schottky barrier height are highly desirable to achieve low contact resistance for a Ge-rich source/drain. However, practical integration of Ge-rich SiGe into devices is complicated by its unique physical and chemical properties as compared to Si-rich epitaxial SiGe. We have observed significant erosion along the SiGe interface with its dielectric cap layer. The N2-H2 remote plasma resist strip process has been shown to trigger this erosion when GeO2 exists together with SiO2 at the interface. The integrity of Ge-rich SiGe contact interface can be preserved by replacing the N2-H2 remote plasma resist strip with an O2-based photoresist ash process. Cross-sectional STEM and EDX elemental analysis have confirmed Germanide and Germanosilicide formation at the Ge-rich SiGe contact interface.

In this paper, a novel nitrogen plasma pretreatment (NPP) has been experimentally demonstrated to improve the thermal stability of thin NiGe film. The root mean square (RMS) roughness of NiGe film pretreated by NPP technique is reduced to 0.52nm, illustrating more uniform and smooth NiGe film than that without pretreatment. The thermal stability of NiGe film is improved to at least 600°C by this technique. The NPP process time is also optimized to be 30s∼120s. The very thin interfacial layer of GeN x formed on Ge surface by NPP technique is believed to suppress oxygen diffusion, thus improving the surface morphology of NiGe film. The formation of Ge-N and/or Ni-N chemical bonds, which inhibits the agglomeration of NiGe, may also help to improve the thermal stability. Therefore, this technique shows great potential for Ge-based technology.

The electron concentration of 3×1020 cm−3 in phosphorus-doped Ge is obtained by in-situ chemical vapor deposition doping and laser annealing. The laser annealing effectively improve the crystallinity in the Ge layer. The pulse laser not only activates the phosphorus, but also produces the biaxial tensile strain. With the nickel germanide contact, the contact resistivity is as low as 1.5×10−8 Ω-cm2 by greatly reducing the tunneling distance. The misfit dislocations at the Ge/Si interface lead to the ideality factor of 1.6 for the Ge/Si hetero-junction diode with on/off ratio of ∼1×105.

Strained Ge p-channel FinFETs on Strain Relaxed SiGe are integrated for the first time on high density 45nm Fin pitch using a replacement channel approach on Si substrate. In comparison to our previous work on isolated sGe FinFETs [1], 14/16nm technology node compatible modules such as replacement metal gate and germanide-free local interconnect were implemented. The I ON /I OFF benchmark shows the high density strained Ge p-FinFETs in this work outperform the best published isolated strained Ge on SiGe devices.

Nickel germanide formed on amorphous and crystalline germanium was investigated for sheet resistance, resistivity and specific contact resistivity of Al to the NiGe layers. This paper reports on electrical characterization of NiGe using both c-Ge and a-Ge.

Zirconium germanide (ZrGe) Schottky source/drain (S/D) contacts were fabricated on n-Ge substrates by using direct sputter deposition of Zr. The electrical properties of ZrGe/n-Ge contact were investigated and an excellent Schottky characteristic with an electron barrier height of 0.59 eV was obtained, implying an extremely low hole barrier height of 0.07 eV. By using ZrGe as S/D, the operation of Schottky Ge p-channel MOSFET was well demonstrated without any S/D impurity doping. Its good performance indicates that ZrGe is available to S/D in Schottky Ge p-MOSFET.

We design the novel dual barrier structure for Germanium MOSFET applications. The source/drain region is proposed to be composited with dual stacked germanide layers, and different barrier heights are hence formed. DC and Analog/RF analysis are carried out with simulations. The results have shown the tradeoff between Ion and Ioff can be feasibly achieved. Furthermore, the devices' performance is nearly insensitive to germanium thickness, which can bring benefit to relax the requirement for the ultra-thin body thickness. With gate length scaled down, the intrinsic gain degrades, but cutoff frequency and intrinsic delay benefit from smaller capacitances.

Nickel germanide formed on amorphous and crystalline germanium is investigated for material and electrical properties. The crystal quality of films formed is poorer for the germanides formed on amorphous germanium with a slight increase in sheet resistance. The grains of NiGe formed on amorphous germanium show a growth that is hexagonal like, extending into the substrate further than germanides grains formed on crystalline germanium. The NiGe formed on crystalline germanium has a much more uniform thickness and uniform grain size and shape. Hollow cone illumination shows that some recrystallisation of the amorphised region of germanium does occur.

In this study we show that incorporation of rare earth metal interlayers such as Yb and Er between Ni and n-Ge can simultaneously enhance the stability of the germanide as well as lower the Schottky barrier (φb) at the germanide/n-Ge interface. As compared to nickel germanide, thermal stability improvement in the low resistance phase by nearly 150 °C and reduction in the electron Schottky barrier height by 0.13 eV was observed for germanides formed using Yb and Er interlayers. This work addresses key challenges in realizing low resistance contacts to n-Ge for future logic and memory applications.

For the first time, Ge CMOS with all thermal processes performed by microwave annealing (MWA) has been realized. The full MWA process is under 390 oC. It significantly outperforms conventional rapid thermal annealing (RTA) process in 3 aspects: (1) Diffusion-less junction: for easily diffused n-type dopant, phosphorous (P), the ion implantation dopant profile after the MWA activation process remains unchanged. (2) Increased C ox and lower gate leakage: the low temperature activation process leads to less Ge out-diffusion during MWA than RTA, suppressing the degradation of gate dielectric/ Ge channel interface. (3) Ultrathin 7.5nm Ni mono-germanide with low sheet resistance (Rs) and contact resistivity: after two-step MWA, a thin mono-NiGe layer was obtained which has larger crystallite size to lower Rs. Ge n- and p-MOSFET were also demonstrated. Compared to conventional RTA, the MWA gives 50% and 24% drive current enhancement for p- and n-MOSFET, respectively. These data show that the low temperature MWA is a very promising thermal process technology for Ge CMOS manufacturing.

High-performance Ge nanowire transistors with single-crystalline germanides as Schottky source/drain contacts were fabricated via the solid-state reaction between a single-crystalline Ge nanowire and two Ni contact pads using rapid thermal annealing. The formed high-quality germanides show atomically clean epitaxial interface with the Ge nanowire. The effect of oxide confinement was also studied to control the growth of nickel germanides, and further to passivate the Ge nanowire surface. In addition, a room-temperature ferromagnetic germanide, Mn 5 Ge 3 , was formed in the fabrication of Mn 5 Ge 3 /Ge/Mn 5 Ge 3 nanowire transistors using a similar approach. Temperature-dependent I–V measurements were performed to extract a Schottky barrier height of 0.25 eV for Mn 5 Ge 3 conducting to p-Ge, which suggested promising spin injection from Mn 5 Ge 3 into Ge nanowires. Our results open up exciting opportunities to fabricate high-performance Ge nanowire transistors and further explore spintronics applications in Ge nanowire heterostructures with high-quality epitaxial interfaces.

We report a low specific contact resistivity of 5.5 x 10-7 Ωcm2 in nickel germanide (NiGe) contacts on n+ Ge. Data fitting with the contact resistivity model by A.M. Roy et al. (2010) suggests SBH of ~0.44eV for NiGe and ~0.55eV for Al/Ti contacts. We correlate this SBH and specific contact resistivity reduction with the dopant segregation at the NiGe/Ge interface and confirm it by SIMS analysis.

We report the first Ω-gate Germanium (Ge) p-channel FinFET with low-temperature Si 2 H 6 passivation and implantless Schottky-barrier nickel germanide (NiGe) metallic Source/Drain, formed on high-quality GeOI substrates using sub-400 °C process modules. As compared with reported multi-gate (MuG) Ge devices in which the Ge channels were formed by top-down approaches, the Ge FinFETs in this work have a record high on-state current I ON of ∼494 µA/µm at V GS - V TH = −1 V and V DS = −1 V. A high I ON /I OFF ratio of more than 3×104 and a high peak saturation transconductance G MSatMax of ∼540 µS/µm were achieved.

We report the demonstration of a new effective Schottky barrier height (Φ B n) reduction technology for NiGe/n-type Germanium (n-Ge) contacts using ion implantation of selenium (Se) or sulfur (S) followed by their segregation at the NiGe/n-Ge interface. Both Se and S are found to segregate at NiGe/n-Ge interface after germanide formation, giving Φ B n as low as ∼0.1 eV. Nickel monogermanide was formed for samples annealed at 350 °C for 30 s. In addition, both Se and S implants cause surface amorphization which possibly leads to improved uniformity of NiGe thickness.

Germanium is of unique interest for CMOS technology because of its high electron and hole mobilities compared with those of its counterpart silicon [1]. Significant progress has been in germanium p-MOSFETs, while in n-MOSFETS there are some hindrances. The diffusivity and poor activation of dopants in Ge [2] will not allow the formation of shallow junctions and low resistivity source and drain regions in Ge MOSFETs. Implantless fabrication with nickel germanide Schottky source and drain contacts is an alternative approach to fabricate Ge p-MOSFETs. S. Zhu et al [3] demonstrated the fabrication of nickel germanide based p-MOSFETs. D. R. Gajula et al [4] showed the effect of RTA temperature on the Schottky barrier height (Ф bn ) of nickel germanides on Ge and observed Ф bn of 0.6–0.7 eV for RTA at approximately 300 °C. So the barrier height for holes (Ф bp = E g -Ф bn ) is nearly zero, which is suitable for Schottky based p-MOSFETs. Electrical characterization of NiGe/Ge diodes was used to measure the Schottky barrier height. Surface characterization of these nickel germanides is very important in optimizing the fabrication of germanide based Ge p-MOSFETs. In this work, we show the surface characterization of nickel germanides formed on germanium with different RTA treatments by using SEM, XRD and XPS techniques.

Group IV dilute magnetic semiconductors (DMS) are candidates for the development of spin based devices due to their compatibility with the traditional semiconductor technology. Ge:Mn alloy thin films grown homoepitaxially on Ge (001) exhibit dilute ferromagnetic behavior, but growth temperatures must be kept below about 200°C to prevent second phase formation. We have grown heteroepitaxial Ge 1−x Mn x quantum dots (QDs) on Si (001) by molecular beam epitaxial co-deposition, with x nominally ranging from 0.02–0.22. In order for strain-induced quantum dots to self-assemble, temperatures of 450°C are used, raising concerns over the unwanted formation of germanide phases. For Mn atomic fractions up to 5 at. %, QD morphologies look surprisingly similar to those of pure Ge QDs grown at identical conditions. M vs. H loops demonstrate ferromagnetic hysteretic behavior below 20K and superparamagnetism up to 70K. These transition temperatures are largely independent of Mn content. Key challenges include determination of the actual Mn content and the location of the Mn, given the very small total amount of Mn present. Ex situ x-ray photoelectron spectroscopy detects Mn, although typically at levels somewhat below those expected from the deposition flux ratio. Using atomic force microscopy, in situ scanning tunneling microscopy, transmission electron microscopy, and in situ scanning Auger mapping, our goal is to clearly ascertain how and where Mn incorporates in our films, especially where the magnetically-active Mn resides, and in so doing to contribute to our understanding of the basic origin of ferromagnetic (FM) ordering in this system. This work is supported by the National Science Foundation under grant number DMR-0907234.

As the scaling of silicon (Si) CMOS device continues, new materials such as SiGe, Ge, group III-V semiconductor, CNT, and Graphene are introduced due to the limit of Si CMOS such as short channel effects (SCE) and mobility degradation. Ge metal oxide semiconductor field effect transistors (Ge-MOSFETs) have received a lot of attention because of their higher carrier mobility compared with Si. Other advantages of Ge are its lower melting point and lower thermal budget processes compared with Si. However, Ge technology also has disadvantage. Currently, Ge MOSFET devices face several challenges such as water solubility, poor stability of germanium oxides, and small band gap [1–2]. The smaller band gap of Ge leads to higher off-current in MOSFET due to its higher source/drain junction leakage and worse SCE.

The effect of Ni on the kinetics of solid phase epitaxial re-crystallization of amorphous germanium films is investigated with Raman spectroscopy. Both Ni implantation and deposition are employed.

High-k/Ge with strontium germanide interlayer has been applied for both p- and n-MISFETs. The observed J g -EOT trend in the Ge-MISCAPs exhibits comparable or superior leakage characteristics to that of state-of-the-art HfSiON gate dielectrics on Si down to an EOT of 0.96nm. The drive current of the p-MISFETs increases with the EOT scaling around 1nm without μ eff degradation. Furthermore, reasonable V th values are observed in both p- and n-MISFETs. These results suggest applicability of the SrGe x interlayer to high-k/Ge CMISFETs.

Co-sputtering of Ni and Pt was proposed for thermal stable Ge MOSFETs on a Ge-on-Si substrate. The thermal stability of Ni germanide was considerably improved compared to the pure Ni germanide by the co-sputtering of Pt along with Ni, because Pt atoms distributed uniformly in the Ni germanide layer, which suppressed the agglomeration of Ni germanide. Therefore, the proposed Ni-Pt co-sputtering method is promising for high performance Ge MOSFET applications.

In this article, we investigated the fabrication and characteristics of Pd germanide Schottky contacts on n-type Ge substrate. It is shown that the lowest sheet resistance and uniform Pd germanide can be obtained by a one step RTP at 400 °C for 30 sec. The proposed Pd germanide/nGe contact exhibited electron Schottky barrier height and work function of 0.565~0.577 eV and 4.695~4.702 eV, respectively. Therefore, the proposed Pd germanide is promising for the nanoscale Schottky barrier Ge channel MOSFETs.

For the first time, growth of high-quality Ge-rich Ge 1−x Si x (0≤x≤0.14) layers on Ge substrate was demonstrated. An effective suppression of the phosphorus diffusion in Ge 1−x Si x and a better thermal stability of the nickel germanide on Ge 1−x Si x were observed. A higher rectifying ratio with a reduced diode leakage current in n+-Ge 1−x Si x /p-Ge 1−x Si x is compared with n+-Ge/p-Ge. These results indicate that it is suitable for Ge 1−x Si x to be used as source/drain (S/D) to fabricate the uniaxial tensile-strained channel Ge nMOSFETs.

A systematic study of the Schottky barrier lowering induced by dopant segregation during Ni and Pt germanidation is presented. Both investigated doping species, As and P, segregated at the germanide/Ge interface during germanidation due to the snowplow effect. The effective Schottky-barrier height at 0 K of NiGe/n-Ge reduced from 0.72 eV for diodes without ion implantation to 0.19 eV by As segregation and to 0.34 eV by P segregration. The Schottky barrier lowering is more effective in PtGe2/n-Ge contacts, where the effective barrier reduces to 0.05 eV by As and to 0.07 eV by P segregation.

Nickel germanides was formed on crystalline n-Ge (100) substrate by conventional RTA annealing at temperatures ranging from 300°C to 600°C. The XRD result reveals that only the NiGe phase is observed during this process temperature range. The orthorhombic structure of NiGe also induces epitaxial tensile strain on Ge substrate (i.e., NiGe itself is compressively strained) due to the difference in the lattice constants. The nickel-germanide/n-Ge Schottky contacts also reveals the slightly increasing electron barrier height (?bn) with the increasing annealing temperature which confirms the Ge substrate is under tensile strain. The compressively strained NiGe, like compressive contact-etching-stop-layer (CESL), is beneficial for PMOS mobility enhancement.

▪ Strained and Ge-based materials have great interests for CMOS technology enhancement ▪ However, their introduction as channel and/or S&D materials has a strong impact on the Salicide process which needs adaptations in order to keep the expected benefit induced by these new materials ▪ Indeed, new issues related to the silicidation (germanidation) of these advanced materials have emerged and most of them have been solved (exemple : Ge lateral diffusion) ▪ In addition to strained and Ge-based materials, the choice of the silicide/germanide contact material in itself, as well as the associated salicide process, are key areas for further performance enhancement (interface engineering, dual silicide approach…)

In this study, thermal stability of Ni germanide on Ge-onSi substrate is improved using Ni-Pt(l%) alloy target. It is believed that Pt incorporation suppressed the oxidation of NiGe and Ni and Ge diffusion. The proposed Ni-Pt/TiN is also efficient in reducing hole barrier height between Ni germanide and source/drain, i.e., decrease of contact resistance therein. The extracted Schottky barrier height shows decrease of about 20 meV. Therefore, the proposed NiPt alloy could be promising for the high mobility Ge pMOSFET applications.

The thermal stability of Ni germanide utilizing pure Ni and Ni-Pd alloy on Ge-on-Si substrate was studied. The proposed Ni-Pd alloy shows the highly thermal immune Ni germanide due to reduced oxidation and retarded Ni and Ge diffusion. Therefore, the Ni-Pd alloy could be promising for the high mobility Ge MOSFET applications.

We demonstrate for the first time 70 nm gate length TiN/HfO2 pMOSFETs on 200 mm GeOI wafers, with excellent performances: ION=330 muA/mum & IOFF=1 muA/mum @ Vd=-1.2 V (without germanide). These performances are obtained using adapted counterdoping and pocket implants. We report the best CV/I vs. IOFF trade-off for Ge or GeOI: CV/I=4.4 ps, IOFF=500 nA/mum @ Vd=-1 V. Moreover, based on fine electrical characterizations (mu, Dit, Raccess) at T=77-300 K, in-depth analysis of both ON & OFF states were carried out. Besides, calibrated TCAD simulations were performed to predict the performance enhancements which can be theoretically reached after further device optimization. By using germanide and reducing both interface state density and diode leakage we expect ION=450 muA/mum, IOFF=100 nA/mum @ Vd=-1 V for Lg=70 nm.

The lack of a stable native germanium oxide has been the main obstacle for the use of Ge in complementary metal oxide-semiconductor CMOS devices. However, recent development of next generation deposited high-k gate dielectrics for Si also allows for the fabrication of high-performance Ge-based metal-oxide-semiconductor field effect transistors (MOSFETs). For the formation of electrical contacts in Ge-based MOSFETs, transition metal germanides, such as Ni- and Pt-germanides, appear to be suitable candidates for this application due to their low resistivity, low formation temperatures (as low as 250degC), and ability to form in self-alignment. In this work, we have characterized the material and electrical properties of nickel and platinum germanide films as Schottky source/drain contacts for Ge-MOSFETs. This paper will focus on the electrical characterization of Ni- and Pt-germanide Schottky contacts on crystalline germanium substrates with particular emphasis on the theoretical analysis of the effect of inversion layer on I-V and C-V characteristics. In addition, the Schottky barrier modulation by germanidation induced dopant segregation will also be discussed.

Systematic studies on Schottky S/D metal-germanide for both Ge PMOSFET (Ni & Pt) and NMOSFET (Er) application are reported. Thermal emission model-based barrier height measurement shows that hole barrier heights for PtGe2/n-Ge (100) and NiGe/n-Ge (100) are extracted as low as Phih~0 eV and ~0.06 eV, respectively, and electron barrier height, Phie~0.12 eV for Er3Ge4/p-Ge (100) contact. Ni- & Pt-germanide Schottky S/D PMOSFETs on Si0.05Ge0.95/Si substrate with HfO2/TaN gate stack are demonstrated with 80%~85% hole mobility enhancement against the universal mobility of Si. However, significantly low drive current was observed for Er-germanides Schottky S/D NMOSFET.

This paper demonstrates the successful fabrication of sub-100 nm Ge pMOSFETs with NiGe MSD and the high device performance, for the first time. It is also revealed that impurity profile engineering is still effective in controlling the electrical characteristics of short channel Ge MOSFET and that the concept of the universality for the inversion-layer mobility does hold even for Ge p-MOSFETs.

The solid-state reaction between Ti-capped Er thin film and Ge(001) was investigated. The germanide film formed had a smooth morphology with the phase identified as ErGe1.5. The film is highly textured with ErGe1.5 (1100) //Ge(001). ErGe1.5 has a resistivity value ~18 muOmega.cm. The Ti cap was able to delay the erbium oxide formation to higher temperature.

We demonstrated for the first time a small size GOI (Germanium-on-insulator) MISFET with nickel germanide source/drain, thin high-k dielectric and metal gate electrode which is fabricated by a new graded Ge condensation method. We obtained two times higher electron mobility in GOI MISFET fabricated by this new graded Ge condensation method when compared with that in SOI MISFET. In addition, a very low leakage current of less than 1 nA and a very high on-current of 549 muA/mum at Vd=Vg=1.2 V were simultaneously obtained in a small size GOI MISFET with the gate length of 0.65 mum.

The lack of a stable native germanium oxide has been the main obstacle for the use of Ge in complementary metal oxide-semiconductor CMOS devices. However, recent development of next generation deposited high-k gate dielectrics for Si also allows for the fabrication of high performance Ge-based metal-oxide-semiconductor field effect transistors (MOSFETs). For the formation of electrical contacts in Ge-based MOSFETs, transition metal germanides, such as Ni and Pt germanides, appear to be suitable candidates for this application due to their low resistivity, low formation temperatures (as low as 250degC), and ability to form in self-alignment. In this work, we have characterized the material and electrical properties of nickel and platinum germanide films as Schottky source/drain contacts for Ge-MOSFETs. This talk will present and discuss experimental results on Ni- and Pt-germanide phase formation, interfacial/surface morphology and Schottky barrier heights in Ni&Pt-germanide contacts formed by the solid state reaction of Ni/Ge(001) and Pt/Ge(001)

In this study, we report Ni silicide and germanide technology for ohmic contacts and metal gates in MOSFET applications. We have systematically investigated the crystalline structures and the electrical properties of NiSi and Ni(Si1-alphaGe;alpha) layers formed on Si and Si1-x-yGexCy, respectively. We have also characterized Ni germanides for metal gates with various metal-germanium composition ratios

Ti- and Ni-germanides were fabricated on n-Ge (100) substrates by sputtering metal Ti or Ni on Ge followed by a furnace annealing. The impacts of anneal temperature on the material the electrical properties of Ti- and Ni-germanide on n-Ge (100) substrates were investigated. The low temperature /spl sim/300/spl deg/C annealing helps to obtain the optimized Schottky contact characteristics in both Ti-germanide/Ge and Ni-germanide/Ge contacts. The well-behaved Ti-germanides/n-Ge Schottky contacts with 0.34eV barrier height were achieved by using a 300/spl deg/C annealing process.

The solid-state reaction of nickel and substrate germanium was performed by isochronously annealing at a temperature ranging from 250-600/spl deg/C in vacuum. The reaction has been begun at 250/spl deg/C, and substantial polycrystalline NiGe film has been formed at 350/spl deg/C. The formed NiGe film has an orthorhombic structure with dimensions comparable to that of bulk NiGe. With increasing the annealing temperature from 400 to 600/spl deg/C, the film surface roughness increases due to the increase of the grain size. All nickel germanide/n-Ge Schottky contacts has similar Schottky barrier height around 0.47-0.48 eV due to the Fermi level pinning effect.