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The purpose of this work is to introduce the ISPRA project aiming to realize a permanent GNSS coastal network collocated with the tide gauges of the ISPRA national network. The objective of integrating the two networks is to link the reference points of the tide gauge to an absolute ITRS reference system (International Terrestrial Reference System). In particular, the GNSS network allows the continuous monitoring of vertical movements; the medium-long term series analysis will allow to discriminate between the effect of vertical movements possibly present in the areas where the tide gauges are installed from the sea level variation due as an effect of the climate change. At the same time this network can contribute to the study of: the Italian geodynamic evolution, the subsidence phenomena, the evolution of the Italian coasts and the risk scenarios preparation especially in densely populated coastal areas.

A number of More-than-Moore (MtM) devices use Silicon-on-Insulator (SOI) wafers, including power devices and CMOS image sensors. Non-contact capacitance-voltage (CV) and photoluminescence measurements are well established for characterization of dielectrics and minority carrier lifetime on bulk Si wafers. In this study, we extend these measurements to More-Than-Moore (MtM) Silicon-On-Insulator (SOI) device wafers.

High-K metal-insulator-metal capacitors are used in many high-performance applications that require both excellent energy storage and minimal energy loss. Often the increase in dielectric permittivity is coupled with an increase in dielectric relaxation or absorption. Additionally, scaling demands that the devices often be used at higher fields, leading to the need to characterize the impact of voltage stress. In this work, the impact of temperature and constant voltage stress on dielectric relaxation in Al 2 O 3 MIM capacitors is studied using measurements of the complex permittivity as a function of frequency and time with a measure-stress-measure program. We observe both the degradation of loss parameters extracted from these spectra and the slow recovery over time. We postulate the existence of a potential threshold of temperature acceleration, and a state of permanent irreversible degradation.

A very stable resistor is needed for analog integrated circuits employed in harsh automotive environments. Precision SiCr thin-film resistors have been characterized by DC and pulsed I-V measurements, high-temperature operating life, and high temperature storage stress. Maximum current density for a maximum drift of 0.1% over the product lifetime are determined. Furthermore, SiCr resistors are stressed to failure and the physical failure mechanism is analyzed.

It is well-known that residual TiN on Al bond pads is detrimental to wire bond reliability. However, the exact reliability impact has not been reported. In this work, we characterize the effect of residual TiN on Au wire bond reliability during high temperature storage at 210 °C (i.e., a high temperature stress required for automotive qualification). We observe no degradation in wire bond pull and shear strength for bond pads with residual TiN prior to high temperature storage. In addition, after high temperature storage, there is no difference in the measured wire bond resistance for bond pads with vs without residual TiN. However, the pull strength is clearly reduced for bond pads with residual TiN. These results show that the effect of residual TiN on wire bond reliability may not be evident at time zero testing, but is only evident after a reliability stress.

As Si is an indirect band gap material, the PL generated by phonon assisted band-to-band (B2B) radiative recombination (of energy equal to energy gap of Si) is very weak; about 10 orders of magnitude lower than the exciting photon flux [1] . If crystallographic defects are present then at room temperature an additional broad defect PL peak is generated (DPL) with energy smaller than the band gap of Si [1] , [2] , [3] . At room temperature, defect-band PL intensity is orders of magnitude lower than the B2B intensity [1] .

A key part of 180nm Bipolar-CMOS-DMOS (BCD) technology is the use of PNP bipolar devices with high beta. Macro and Micro Photoluminescence Imaging (MacroPL, μPL) uses excitation of charge carriers in semiconductor by high intensity illumination, followed by observation of photons at longer wavelength generated from radiative recombination; both band to band and defect to band emissions were used. Use of Micro Photoluminescence Imaging allows rapid characterization and corrective actions for dislocations and other defects which suppress PNP beta.

Metal-Insulator-Metal (MIM) capacitors are widely used in More-than-Moore technologies, such as RF devices and image sensors. These technologies typically use SiN for the MIM capacitor dielectric, which has good reliability but a relatively low capacitance density. In this report we examine the reliability and performance tradeoffs for a MIM capacitors based on an Al 2 O 3 / SiO 2 dielectrics.

Power semiconductors used in automotive applications are exposed to higher temperatures and higher currents than devices used in consumer products. The qualification of these devices includes power-temperature cycling (PTC) stresses on fully integrated structures where the devices are powered on and off during cyclic temperature stresses. These PTC stresses are time consuming and can require device redesign if fails are observed. Use of a simple power cycling (PC) stress, with simple test structures, can serve as a rapid assessment tool for process development. The PC test has no decoupling of current stress from temperature stress, meaning that electromigration and thermomechanical stress effects are applied simultaneously. The determination of the physics of failure is helpful to understand how to modify the process for robustness during development cycles. In this work it is shown how different back-end architectures influences the time to failure of the devices under the PC stress tests.

Power semiconductors used in automotive applications are exposed to higher temperatures and higher currents than devices used in consumer products. The qualification of these devices includes power-temperature cycling (PTC) stresses on fully integrated structures. The PTC stresses are time consuming and can require device redesign if fails are observed. In this report, we show that PTC stresses using simple test structures can be used to quickly test the interconnects and wire bonds, and thereby highlight weak links in the process.

We report on bond pad damage for a smart power device using 50.8 µm (2 mil) diameter Pd-coated Cu wire. We show that the damage can be relatively subtle; the wire bonds on damaged structures have high pull and shear strength, but cracks in the underlying regions lead to metal extrusions that cause electrical shorts.

For Moore's law technology qualifications, the Back-End of Line (BEOL) reliability focuses on electromigration, stress migration, Time Dependent Dielectric Breakdown (TDDB), and Chip-Package Interaction (CPI). For More-Than-Moore technology qualifications, some additional BEOL reliability tests are often required. Power semiconductors used in automotive applications are exposed to higher temperatures and higher currents than devices used in consumer products. Hence, the BEOL reliability includes power-temperature cycling stresses, high current pulsed stresses, high temperature storage above 200°C, and unique package connections such as 2mil Cu wirebonds or Cu clips.

Micro Photoluminescence Imaging was used to identify the impact of thermal steps on dislocation density associated with Deep Trench Isolation. Previous work showed gate oxide failure due to slip associated with dislocations from the deep trenches. Micro Photoluminescence Imaging demonstrated capability to observe dislocation generation caused by thermally induced stress during processing of Deep Trench Isolation (DTI) wafers.

In this study, device reliability is characterized for two different 0.18 μm backside illumination CMOS image sensor technologies. We show that for devices with an SiO 2 liner over the gates and with SiN backside dielectrics, the backside processing can degrade device reliability (due to hydrogen depassivation) and that backside process optimization is required to achieve acceptable device reliability (to allow effective repassivation during the final hydrogen anneal).

High resistance polysilicon resistors have been characterized by DC and pulsed I-V sweep measurements, resistance vs. temperature, and DC and pulsed voltage stress/measurement cycling. The combination of these measurements along with resistor linearity and electro-migration rules are used to determine the maximum safe-operating area. It is shown that the resistance shifts at high current conditions cannot be explained by electromigration alone, and are instead attributed to migration of dopants, Si, or hydrogen, either singly or in combination, both due to high self-heating. The results are used to create voltage and current checks within SPICE models allowing for robust design at maximum operating conditions. IR-OBIRCH physical analysis was performed and shows asymmetric changes to the resistor head regions.

This paper focuses on the optimal operations of an industrial power plant equipped with a Combined Cooling, Heat and Power (CCHP). The goal of the control strategy is to minimize the generation and maintenance costs of the power plant, scheduling the CCHP's operations, the usage of the auxiliary generators (used to meet the demand when the CCHP is turned OFF), the purchasing/selling phase from/to the main grid and integrating the renewable energy sources. The overall problem is stated as a constrained mixed integer linear optimization problem with both continuous and logical variables. A Model Predictive Control (MPC) approach is used to compensate forecasts uncertainties in the control strategy. Being the industrial work load related to the production lines consumption, an optimal load allocation algorithm is implemented to optimally schedule the production lines over the planning day. The simulation results are performed on an industrial plant layout located in the city of Benevento, in Italy.

Hybrid bonding, with wafer-level bonding to form oxide-oxide bonds and Cu-Cu bonds, is a promising technology for 3D integrated circuits. In this study, we describe the design, processing. and characterization of test structures formed using hybrid bonding for wafers built in two different technologies; a 180 nm Al BEOL technology and a 110nm Cu BEOL technology. The reliability evaluation shows good results for package level and wafer level stresses.

Two unique gate oxide failure mechanisms are associated with deep trench processes for a 0.18 μm power semiconductor device. One failure mode is a “mini-LOCOS” defect, that is due to inadvertent oxidation of Si in the active area during deep trench oxidation. The other failure mode is due to slip associated with dislocations from the deep trenches. These defects are eliminated by optimizing the SiN oxidation barrier used during deep trench oxidation and by optimizing high temperature anneals to minimize dislocation generation.

Parametric device shifts occur in a 0.25 μm CMOS sense amp circuit during a High Temperature Operation Life (HTOL) test, due to the positive bias stress on the pMOSFET devices. The positive gate bias from the HTOL stress causes a larger negative shift in the threshold voltage of the 5V pMOSFET devices and a mismatch in the transconductance of the differential pair, resulting in a decrease in the gain of the amplifier. Negative shifts in threshold voltage are also observed for 5V pMOSFET test structures for devices with no protect diodes (antenna ratio = 1000:1) after either Positive Bias Temperature Instability (PBTI) tests or Positive Bias Temperature Stress (PBTS). The PBTI and PBTS are caused by positive charge from interface states and bulk oxide traps.

In this paper we present a Teledentistry system aimed to the Second Opinion task. It make use of a particular camera called intra-oral camera, also called dental camera, in order to perform the photo shooting and real-time video of the inner part of the mouth. The pictures acquired by the Operator with such a device are sent to the Oral Medicine Expert (OME) by means of a current File Transfer Protocol (FTP) service and the real-time video is channeled into a video streaming thanks to the VideoLan client/server (VLC) application. It is composed by a HTML5 web-pages generated by PHP and allows to perform the Second Opinion both when Operator and OME are logged and when one of them is offline.