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Recently, p-type metal–oxide–semiconductors have attracted considerable interests for the applications in optoelectronic devices and low-power complementary metal–oxide–semiconductor circuits. In this report, ternary p-type CuAlxOy semiconductor thin films were fabricated by sol–gel method and integrated as channel layers in thin-film transistors (TFTs). The electrical performances of CuAlxOy TFTs, together with the characteristics of CuAlxOy thin films (e.g., crystalline phases, chemical compositions, surface morphology, and optical transmittances), were systematically studied at various annealing temperatures (${T}_{a}$). The phase-pure CuAlO2 thin films were obtained at ${T}_{a}$ above 800° C in N2 atmosphere. CuAlO2 TFTs annealed at 900 ° C based on high-k Al2O3 exhibited optimized electrical performance, including a hole mobility of 1.36 cm2/Vs and on/off current ratio of $\sim 1 \times 10^{\textsf {5}}$. This paper not only demonstrates the successful fabrication of high-quality p-type CuAlO2 semiconductor thin film and electronic devices by sol–gel process but also provides guidelines for related ternary p-type oxide semiconductor material and device performance improvements. [ABSTRACT FROM AUTHOR]

This paper presents a study concerning the role of channel length scaling on IGZO TFT technology benchmark parameters, which are fabricated at temperatures not exceeding 180\, ^\circC. The parameters under investigation are unity current-gain cutoff frequency, intrinsic voltage-gain, and on-resistance of the bottom-gate IGZO TFTs. As the channel length varies from 160 to 3 \mum, the measured cutoff frequency increases from 163 {\rm kHz} to 111.5 {\rm MHz}$, which is a superior value compared to the other competing low-temperature thin-film technologies, such as organic TFTs. On the other hand, for the same transistor dimensions, the measured intrinsic voltage-gain is changing from 165 to 5.3 and the on-resistance is decreasing from 1135.6 to 26.1 k$\Omega$ . TFTs with smaller channel length (3 $\mu$ m) have shown a highly negative turn-on voltage and hump in the subthreshold region, which can be attributed to short channel effects. The results obtained here, together with their interpretation based on device physics, provide crucial information for accurate IC design, enabling an adequate selection of device dimensions to maximize the performance of different circuit building blocks assuring the multifunctionality demanded by system-on-panel concepts. [ABSTRACT FROM PUBLISHER]

This paper presents analog building blocks that find potential applications in display panels. A buffer (source-follower), subtractor, adder, and high-gain amplifier, employing only n-type enhancement amorphous gallium–indium–zinc–oxide thin-film transistors (a-GIZO TFTs), were designed, simulated, fabricated, and characterized. Circuit simulations were carried out using a neural model developed in-house from the measured characteristics of the transistors. The adder–subtractor circuit presents a power consumption of 0.26 mW, and the amplifier presents a gain of 34 dB and a power consumption of 0.576 mW, with a load of 10 M\Omega//16 pF. To the authors’ knowledge, this is the highest gain reported so far for a single-stage amplifier with a-GIZO TFT technology. [ABSTRACT FROM PUBLISHER]

This letter presents a novel high-gain four-quadrant analog multiplier using only n-type enhancement indium-gallium–zinc-oxide thin-film-transistors. The proposed circuit improves the gain by using an active load with positive feedback. A Gilbert cell with a diode-connected load is also presented for comparison purposes. Both circuits were fabricated on glass at low temperature (200 °C) and were successfully characterized at room temperature under normal ambient conditions, with a power supply of 15 V and 4-pF capacitive load. The novel circuit has shown a gain improvement of 7.2 dB over the Gilbert cell with the diode-connected load. Static linearity response, total harmonic distortion, frequency response, and power consumption are reported. This circuit is an important signal processing building block in large-area sensing and readout systems, specially if data communication is involved. [ABSTRACT FROM AUTHOR]

During the last years, oxide semiconductors have shown that they will have a key role in the future of electronics. In fact, several research groups have already presented working devices with remarkable electrical and optical properties based on these materials, mainly thin-film transistors (TFTs). Most of these TFTs use indium-tin oxide (ITO) as the material for source/drain electrodes. This paper focuses on the investigation of different materials to replace ITO in inverted-staggered TFTs based on gallium-indium-zinc oxide (GIZO) semiconductor. The analyzed electrode materials were indium-zinc oxide, Ti, Al, Mo, and Ti/Au, with each of these materials used in two different kinds of devices: one was annealed after GIZO channel deposition but prior to source/drain deposition, and the other was annealed at the end of device production. The results show an improvement on the electrical properties when the annealing is performed at the end (for instance, with Ti/Au electrodes, mobility rises from 19 to 25 cm²/V · s, and turn-on voltage drops from 4 to 2 V). Using time-of-flight secondary ion mass spectrometry (TOF-SIMS), we could confirm that some diffusion exists in the source/drain electrodes/semiconductor interface, which is in close agreement with the obtained electrical properties. In addition to TOF-SIMS results for relevant elements, electrical characterization is presented for each kind of device, including the extraction of source/ drain series resistances and TFT intrinsic parameters, such as μi (intrinsic mobility) and VTi (intrinsic threshold voltage). [ABSTRACT FROM AUTHOR]

Presents a model to interpret the steady-state and the dynamic detection limits of one dimensional thin film position sensitive detectors based on p-i-n a-Si:H devices. Description of the theoretical model; Potential and lateral current static distributions; Determination of the device transient response; Experimental setup.

In this letter, we report for the first time the use of a sheet of cellulose-fiber-based paper as the dielectric layer used in oxide-based semiconductor thin-film field-effect transistors (FETs). In this new approach, we are using the cellulosefiber-based paper in an "interstrate" structure since the device is built on both sides of the cellulose sheet. Such hybrid FETs present excellent operating characteristics such as high channel saturation mobility (> 30 cm2 /Vs), drain-source current on/off modulation ratio of approximately l04, near-zero threshold voltage, enhancement n-type operation, and subthreshold gate voltage swing of 0.8 V/decade. The cellulose-fiber-based paper FETs' characteristics have been measured in air ambient conditions and present good stability, after two months of being processed. The obtained results outpace those of amorphous Si thin-film transistors (TFTs) and rival with the same oxide-based TFTs produced on either glass or crystalline silicon substrates. The compatibility of these devices with large-scale/large-area deposition techniques and lowcost substrates as well as their very low operating bias delineates this as a promising approach to attain high-performance disposable electronics like paper displays, smart labels, smart packaging, RFID, and point-of-care systems for self-analysis in bioapplications, among others. [ABSTRACT FROM AUTHOR]