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In this paper, we propose ERGO (edge architecture for Ag-IoT), an edge-computing architecture for infrastructureless smart agriculture environments. We also develop Ag-IoT application APIs and the associated microservice infrastructure. Our implementation and evaluations show that ERGO can operate independently of cloud-backed assistance, is highly scalable, modular, and affords composability benefits to Ag-IoT systems. We also demonstrate that ERGO outperforms traditional infrastructure in response latencies and transactional throughput, on average, by over 54% and 77%, respectively.

Microservices-based architectures gain more and more attention in industry and academia due to their tremendous advantages such as providing resiliency, scalability, composability, etc. To benefit from these advantages, a proper architectural design is very important. The decomposition model of services into microservices and the granularity of these microservices affect the different aspects of the system such as flexibility, maintainability, performance, and security. An inappropriate service decomposition into microservices (improper granularity) may increase the attack surface of the system and lower its security level. In this paper, first, we study the probability of compromising services before and after decomposition. Then we formulate the impacts of possible service decomposition models on confidentiality, integrity, and availability attributes of the system. To do so, we provide equations for measuring confidentiality, integrity, and availability risks of the decomposed services in the system. It is also shown that the number of entry points to the decomposed services and the size of the microservices affect the security attributes of the system. As a use case, we propose three different service decomposition models for the 5G NRF (Network Repository Function) and calculate the impacts of these decomposition models on the confidentiality, integrity, and availability of the system using the provided equations.

Proofs in simulation-based frameworks have the greatest rigor when they are machine checked. But the level of details in these proofs surpasses what the formal-methods community can handle with existing tools. Existing formal results consider streamlined versions of simulation-based frameworks to cope with this complexity. Hence, a central question is how to abstract details from composability results and enable their formal verification.In this paper, we focus on the modeling of system communication in composable security statements. Existing formal models consider fixed communication patterns to reduce the complexity of their proofs. However, as we will show, this can affect the reusability of security statements. We propose an abstract approach to modeling system communication in Constructive Cryptography that avoids this problem. Our approach is suitable for mechanized verification and we use CryptHOL, a framework for developing mechanized cryptography proofs, to implement it in the Isabelle/HOL theorem prover. As a case study, we formalize the construction of a secure channel using Diffie-Hellman key exchange and a one-time-pad.

The concepts of information flow security and refinement are known to have had a troubled relationship ever since the seminal work of McLean. In this work we study refinements that support changes in data representation and semantics, including the addition of state variables that may induce new observational power or side channels. We propose a new epistemic approach to ignorance-preserving refinement where an abstract model is used as a specification of a system’s permitted information flows, that may include the declassification of secret information. The core idea is to require that refinement steps must not induce observer knowledge that is not already available in the abstract model. Our study is set in the context of a class of shared variable multiagent models similar to interpreted systems in epistemic logic. We demonstrate the expressiveness of our framework through a series of small examples and compare our approach to existing, stricter notions of information-flow secure refinement based on bisimulations and noninterference preservation. Interestingly, noninterference preservation is not supported “out of the box” in our setting, because refinement steps may introduce new secrets that are independent of secrets already present at abstract level. To support verification, we first introduce a “cube-shaped” unwinding condition related to conditions recently studied in the context of value-dependent noninterference, kernel verification, and secure compilation. A fundamental problem with ignorance-preserving refinement, caused by the support for general data and observation refinement, is that sequential composability is lost. We propose a solution based on relational pre-and postconditions and illustrate its use together with unwinding on the oblivious RAM construction of Chung and Pass.

Cyberinfrastructure is everywhere in diverse forms in service of applications in science, business and society. From IoT to extreme-scale computing data and computing have never been so distributed with the potential for real-time integration into these applications. The common theme to these applications, mostly composed of (big) data-integrated workloads, is their need to run in specialized environments for reasons such as on-demand or 24x7 nature of the tasks they are performing, and difficulties regarding their portability, latency, privacy, and performance optimization. Moreover, in many data-driven scientific applications, there is a need for heterogeneous integration of tasks requiring specialized computing capabilities with traditional high-throughput computing or high-performance computing tasks. Although some key middleware technologies enabled demonstration of standalone heterogeneous applications, such integration requires expertise convergence from a large group of people in very specialized settings. There are still many challenges for streamlined, scalable, repeatable, responsible, and explainable integration of data-integrated applications. Key opportunities for further innovations include intelligent systems and automated workflow management software that can compose and steer dynamic applications that can adapt to changing conditions in a data-driven fashion while integrating many tools to explore, analyze and utilize data. This talk will discuss some examples for data-integrated applications, describe emerging systems that enabled these applications, and overview our recent research to enable composable applications including a convergence application development methodology, intelligent middleware, and workflow composition.

Modern cloud computing workloads are becoming day by day more demanding, in terms of computational resources, as they feature multiple complex components, utilize heterogeneous hardware, and require tremendous amounts of memory. Such attributes of the emerging workloads disrupt the traditional design of cloud infrastructures, which are bound to decisions at the design time of the infrastructure, and mandate the dynamic composability of the next-generation cloud infrastructures.Scaling beyond the physical boundaries of the server trays, and minimizing over-provisioning of the nodes by disaggregating computational resources, such as CPUs, memory, etc., is a timely research problem. However, the prior line of research focuses on either NVM technologies or other disk-related approaches that try to relax the resource pressure induced by over-provisioning.In this work, we design, implement, and evaluate all necessary changes in the system software stack to support the dynamic allocation of disaggregated memory, depending on the needs of the workloads at hand. As a result, we can transparently increase the available memory of a system and achieve on average 57% better performance, compared to Swap, the de-facto mechanism used today for over-provisioning. Furthermore, we present a memory balancing policy that autonomously migrates memory pages across local and disaggregated memory. Our experimental results show that, even with a limited amount of local memory, memory balancing improves the performance by 41% on average, compared with using only disaggregated memory.

Robotic testbeds used for flight and research technology development are highly complicated electromechanical systems demanding large engineering effort to configure and manage safety-critical hardware. The software that interoperates with robotic testbeds needs to be robust yet flexible to accommodate rapidly changing testbed needs and other operational demands in a cost-efficient manner. The Jet Propulsion Laboratory (JPL) presents a new open-source C++ library called Fastcat for powerful and flexible EtherCAT device configuration for testbed and robotic applications. Fastcat implements a set of C drivers called ‘Just SOEM Drivers’ built on the popular Simple Open EtherCAT Master library for a small, but highly tested set of supported EtherCAT devices. Fastcat offers a rich set of capabilities such as supporting an arbitrary number of EtherCAT Masters, a YAML input configuration file, and a visualization tool ‘Fcviz’ to graph the bus topology using the open-source Graphiz library. Furthermore, a novel feature called ‘Fastcat Signals’ can efficiently route data and commands between devices to compose self-contained closed loop control systems such as heaters or joint-torque controllers with zero added latency. Abstract device types like signal generators, functions, and PID controllers and offline versions of device hardware drivers allow for powerful composability, offline-only testing, and flexible hybrid partial online – offline bus topologies. The Fastcat core library is middleware agnostic, but ROS2 wrappers are developed for ease-of-use. This paper will describe design tradeoffs, an overview of the implementation of these capabilities, and early results from the first JPL Robotic testbed use.

A simulation System of Systems (SoS) comprised of various simulation systems may have dissimilar modeling paradigms. For performing autonomy research and development, various types of simulation systems need to be brought together to build a multi-domain virtual SoS wherein effects of autonomous entities/agents can be observed. While the distributed simulation community has solved the integrability challenge using standards like Distributed Interactive Simulation (DIS) or High Level Architecture (HLA), the model composability challenge is an open research problem. Many software/systems can now be made available as docker applications which can be readily plugged into existing simulation systems. However, the trust issues with such integration limit their usage as established systems cannot trust third party apps. This paper highlights some of the challenges with building a cloud-based simulation SoS, proposes an architecture framework using the concept of structural autonomy and leverages Modeling & Simulation as a fundamental key enabler for autonomy research.

To implement Service Oriented Architecture (SOA) in a banking company for transactional banking activity, this paper aims to overcome the problem of several related surrounding systems which has the same function in the different system by using Domain Driven Design. The paper proposes an approach to SOA using Web Services for service delivery in the area of transactional banking activities. Several systems will be connected to a BUS that will wait on and manage any request coming from other applications. To design the system then in this paper also will identify which application will consume the same function and analyze which function belongs to a certain domain. The paper finds that the implementation of an SOA system for transactional banking activities can be achieved by rapidly changing the habit of scaling up the system and application. This study shows that banking activity has a huge number of systems that should sync one and another to maintain the data integrity, availability, interoperability, and composability of the system.

There are multiple steps involved in transitioning a server from the factory to being fully provisioned for an intended workload. These steps include finding the optimal slot for the hardware and to compose the required resources on the hardware for the intended workload. There are many different factors that influence the placement of server hardware in the datacenter, such as physical limitations to connect to a network be it Ethernet or storage networks, power requirements, temperature/cooling considerations, and physical space, etc. In addition to this, there may be custom requirements driven by workload policies (such as security, data privacy, power redundancy, etc.). Once the server has been placed in the right slot it needs to be configured with the appropriate resources for the intended workload. CIED will provide a ranked list of locations for server placement based on the intended workload, connectivity and physical requirements of the server. Once the server is placed in the suggested slot, the solution automatically discovers the server and composes the required resources (compute, storage and networks) for running the appropriate workload. CIED reduces the overall time taken to move hardware from factory to production and also maximizes the server hardware utilization while minimizing downtime by physically placing the resources optimally. From the case study that was undertaken, the time taken to transition a server from factory to being fully provisioned was proportional to the number of devices in the datacenter. With CIED this time is constant irrespective of the complexity or the number of devices in a datacenter.

Microservices architecture has become one of the most prominent software architectures in the software development processes due to its features such as scalability, maintainability, resilience, and composability. It allows developing business applications in a decentralized manner by dividing the important business logic into separate independent services. Digital certificates are used to verify the identity of microservices in most cases. However, the certificate authorities (CA) who issue the certificates to microservices cannot be trusted always since they can issue certificates without the consent of the relevant microservice. Nevertheless, existing implementations of certificate transparency are mostly centralized and has the vulnerability of the single point of failure. The distributed ledger technologies such as blockchain can be used to achieve decentralized nature in certificate transparency implementations. A blockchain-based decentralized certificate transparency system specified for microservices architecture is proposed in this paper to ensure secure communication among services. After the implementation and deployment in a cloud service, the system expressed average certificate querying time of 643 milliseconds along with the highly secured service provided.

We address energy-efficient placement of data and analytics components of composite analytics services on a wireless network to minimize execution-time energy consumption (computation and communication) subject to compute, storage and network resource constraints.We introduce an expressive analytics service hypergraph model for representing k-ary composability relationships (k ≥ 2) between various analytics and data components and leverage binary quadratic programming (BQP) to minimize the total energy consumption of a given placement of the analytics hypergraph nodes on the network subject to resource availability constraints. Then, after defining a potential energy functional Φ(•) to model the affinities of analytics components and network resources using analogs of attractive and repulsive forces in physics, we propose a decentralized Metropolis Monte Carlo (MMC) sampling method which seeks to minimize Φ by moving analytics and data on the network. Although Φ is non-convex, using a potential game formulation, we identify conditions under which the algorithm provably converges to a local minimum energy equilibrium placement configuration.Trace-based simulations of the placement of a deep-neural-network analytics service on a realistic wireless network show that for smaller problem instances our MMC algorithm yields placements with total energy within a small factor of BQP and more balanced workload distributions; for larger problems, it yields low-energy configurations while the BQP approach fails.

Complex simulation systems often comprise multiple distributed simulators that need to interoperate and synchronize states and events. In many cases, the simulation logics which are developed by different teams with specific expertise, need to be integrated to build a complete simulation system. Thus, supporting composability and reusability of simulation functionalities with minimal integration and performance overhead is a challenging but required capability. Middleware for game engines are promising to realize both the modular and reusable development criteria as well as the high performance requirements, while data-centric publish/subscribe middleware can support seamless integration and synchronization of the distributed artifacts. However, differences in the level of abstraction at which these middleware operate and the semantic differences in their underlying ontologies make it hard and challenging for simulation application developers and system integrators to realize a complete, operational system. To that end this paper presents a model-driven approach to blending the two middleware, wherein the modeling capabilities provide intuitive and higher-level abstractions for developers to reason about the composition and validation of the complete system, and the generative capabilities address the inherent and accidental complexities incurred in reconciling the semantic differences between the gaming and pub/sub middleware. We present a concrete implementation of our approach and illustrate its use and performance results using simple use cases.

Simulation studies make use of various types of simulation experiments. For users, specifying these experiments is a demanding task since the specification depends on the experiment type and the idiosyncrasies of the used tools. Thus, we present an experiment generation procedure that guides users through the specification process, and abstracts away from the concrete execution environment. This abstraction is achieved by (1) developing schemas that define the properties of simulation experiments and dependencies between them, (2) specifying a mapping between schema properties and template fragments in the specification language of a target backend. We develop schema, template fragments, and mappings for stochastic discrete-event simulation, and show how the concepts can be transported to a different domain of modeling and simulation. Further, we expand the developed "simple" experiment schemas by a schema for experiment designs, and generate executable sensitivity analysis experiments, thereby demonstrating versatility and composability of our approach.

Composability is one of seven reasons for the long-standing and continuing success of MPI. Extending MPI by composing its operations with user-level operations provides useful integration with the progress engine and completion notification methods of MPI. However, the existing extensibility mechanism in MPI (generalized requests) is not widely utilized and has significant drawbacks. MPI can be generalized via scheduled communication primitives, for example, by utilizing implementation techniques from existing MPI-3 nonblocking collectives and from forthcoming MPI-4 persistent and partitioned APIs. Non-trivial schedules are used internally in some MPI libraries; but, they are not accessible to end-users. Message-based communication patterns can be built as libraries on top of MPI. Such libraries can have comparable implementation maturity and potentially higher performance than MPI library code, but do not require intimate knowledge of the MPI implementation. Libraries can provide performance-portable interfaces that cross MPI implementation boundaries. The ability to compose additional user-defined operations using the same progress engine benefits all kinds of general purpose HPC libraries. We propose a definition for MPI schedules: a user-level programming model suitable for creating persistent collective communication composed with new application-specific sequences of user-defined operations managed by MPI and fully integrated with MPI progress and completion notification. The API proposed offers a path to standardization for extensible communication schedules involving user-defined operations. Our approach has the potential to introduce event-driven programming into MPI (beyond the tools interface), although connecting schedules with events comprises future work. Early performance results described here are promising and indicate strong overlap potential.

Modern embedded many-core systems host, among others, real-time applications which must be dynamically launched at run time. To this end, Hybrid Application Mapping (HAM) methodologies combine design-time analysis with runtime mapping techniques to enable dynamic application mapping with performance guarantees, e.g., w.r.t. real-time constraints. They rely on composability to derive the required performance guarantees in an isolated analysis of individual applications at design time. The ongoing process technology downsizing, however, has given rise to an increased on-chip temperature, so that the thermal integrity of the platform must be monitored and enforced at run time by means of Dynamic Thermal Management (DTM) techniques which use countermeasures e.g. DVFS and power gating. This, however, violates composability, as the thermally unsafe behavior of one application may trigger DTM countermeasures that affect other applications running in the thermally affected region which, in turn, may lead to the violation of their real-time constraints. As a remedy, this paper proposes, for the first time, a thermally composable HAM methodology that enforces thermal safety proactively at the launch time of applications and, thereby, prevents DTM interferences which react to thermal violations. To that end, we present (a) a novel thermal-safety analysis that can be integrated into the design-time analysis of HAM and (b) a set of thermal-safety admission checks that can be used at run time when launching an application. By establishing thermal composability among running applications, the proposed HAM approach enables providing thermally safe real-time guarantees for dynamically mapped applications in many-core systems. Experimental results for a variety of hard real-time applications on multiple heterogeneous many-core architectures demonstrate the efficiency and effectiveness of the proposed methodology.

Future intelligent management systems compose of heterogeneous devices with lots of applications cooperatively to analyze data. Recent advances in Service-Oriented Architecture (SOA) provide opportunities for solving this challenge with reusability, composability, and abstraction. In this paper, we develop an intelligent management platform using cloud computing and SOA. It provides different service modules to collect, store, analyze, and visualize the Internet of Things (IoT) data to fit Cyber-Physical System (CPS), all these functions are wrapped as RESTful APIs so it can be imported to other applications, making the same service can be reused to meet the requirements of different fields. In addition, an editable dynamic dashboard service is proposed to personalize the management demand in a click-and-drag way. Users can analyze and observe data for intelligent management. Finally, we apply these services to build three different applications to validate the power of our service platform.

In today’s Big Data era, data scientists require new computational instruments in order to quickly analyze large-scale datasets using complex codes and quicken the rate of scientific progress. While Federally-funded computer resources, from supercomputers to clouds, are beneficial, they are often limiting - particularly for deep learning and visualization - as they have few Graphics Processing Units (GPUs). GPUs are at the center of modern high-performance computing and artificial intelligence, efficiently performing mathematical operations that can be massively parallelized, speeding up codes used for deep learning, visualization and image processing, more so than general-purpose microprocessors, or Central Processing Units (CPUs). The University of Illinois at Chicago is acquiring a much-in-demand GPU-based instrument, COMPaaS DLV - COMposable Platform as a Service Instrument for Deep Learning & Visualization, based on composable infrastructure, an advanced architecture that disaggregates the underlying compute, storage, and network resources for scaling needs, but operates as a single cohesive infrastructure for management and workload purposes. We are experimenting with a small system and learning a great deal about composability, and we believe COMPaaS DLV users will benefit from the varied workflow that composable infrastructure allows.

Building large resilient and computer systems can be challenging, especially when temporal predictability is also required. Large resilient systems are typically composed of different networking technologies, for example, using different wired and wireless communication technologies. Building such systems with safety-relevant services demands appropriate system interfaces and algorithmic concepts. In this talk we present some design patterns that are useful to build such large resilient and predictable systems. Often, the underlying communication medium does not provide the reliability and real-time properties that are needed for a concrete application. In such a case the presented design patterns can be implemented as a communication layer on top of the underlying communication system. We discuss design patterns for interaction autonomy, system communication and reliability.

Composability is a key component to improve programmers’ productivity in writing fast market-expanding applications such as parallel machine learning algorithms and big data analytics. These applications exhibit both regular and irregular compute patterns, and are often combined with other functions or libraries to compose a larger program. However, composable parallel processing has taken a back seat in many existing parallel programming libraries, making it difficult to achieve modularity in large-scale parallel programs. In this paper, we introduce a new parallel task programming library using composable tasking graphs. Our library efficiently supports task parallelism together with an intuitive task graph construction and flexible execution API set to enable reusable and composable task dependency graphs. Developers can quickly compose a large parallel program from small and modular parallel building blocks, and easily deploy the program on a multicore machine. We have evaluated our library on real-world applications. Experimental results showed our library can achieve comparable performance to Intel Threading Building Blocks with less coding effort.

The demand for low cost high quality products is continuing to grow in the marketplace. Technology and the advent of robotic engineering have paved the way to reduce cost of manufacturing, and, yet, the cost of test and its resulting test equipment is still high. How, then, do we approach the problem of reducing the cost of test and, at the same time, streamline the assembly and test flow? The answer lies in establishing a Composable Test Architecture, which utilizes common test methods (CTM) for testing functions and defines composable test systems to test those functions. Most products can be decomposed into key functions, encapsulated within a system utilizing a modular open system architecture. Specific modular systems can then be selected and composed into a more complex product, such as a smartphone, to satisfy the user's needs without losing any of its core functionality. Thus, the modular product can also be called a composable system, to which common test methods can be applied and subsequent composable test systems aligned to the modular product can be developed. By defining a standard methodology for testing each composable system in a product, the cost of test can be reduced by reusing those CTMs for new product development. The end result is the establishment of a composable test library that includes 1) the CTMs which define the test methodology, or “how to test”, for each composable system, and 2) the corresponding composable test equipment used to test the composable system. Composable test equipment is comprised of a standardized set of test instruments performing a standard list of test measurements. As the end product is built up, the same set of test instruments and measurements can be utilized at the next level of assembly to ensure the final product still meets requirements. This paper discusses the principles behind composable systems and how that can be leveraged to build composable test equipment. The conclusion will demonstrate how implementing a composable test architecture can shorten the test equipment development cycle and streamline test in the factory.

Colored Petri Net (CPN) is a graphical modeling language for simulation and modeling and for verification of discrete event systems. CPN allows developers to define a model in the form of reusable components. A model component is an independent element, which is specified using a formalized description, can conform to a certain component standard, has a well-defined interface, and encapsulates certain behavior. Modern components can help the developer reuse existing models according to their requirement as it reduces the cost and time of development. Composability is the capability to select and integrate various components to fulfill user requirements. Composability provides the means to achieve reusability where "reuse" is the ability of a simulation component to be reclaimed for various applications. We propose a verification framework for developers to select and assemble CPN-based components and verify their composability. The goal of this paper is to provide a pattern which helps developer in making models of concurrent systems. We present a case study of a restaurant model as proof of concept. A verified composition affirms reuse of model components in a meaningful manner by satisfying given requirement specifications.

In recent engineering practice, the complexity of the systems is increasing. This complexity will keep on increasing if new components are added into the system or system configuration is changed. Numerous configurations of these components are repeated or their relationship is recognizable. On the other hand, simulation tools are commonly used to track the behavior of the modeled systems over time because of their advantages against experimental setups which are the abstraction of reality. However, the ability to integrate different components at different levels of the designed model along with the different techniques used for their inter-relationships based on users requirement is a challenge. The main contribution of this paper is to give an example of how to apply composability to handle this issue. One tangible example is to study the behavior of heating, ventilation, and air-conditioning systems in large buildings. Therefore, finding a solution to model this kind of complex system in a highly composable and scalable view is promising. Composability is a system design challenge that describes how different components can be selected and combined in different configurations and different levels to satisfy users requirement with a highly reduced development cost and time in the simulation, as its advantages. Finally, the practical steps for design and implementation of a composable demand-controlled ventilation and heating system as a useful and energy-efficient smart building's technology in MATLAB/Simulink (besides its constraints) is provided.

We present a framework called Composable Modular Design (CMD) to facilitate the design of out-of-order (OOO) processors. In CMD, (1) The interface methods of modules provide instantaneous access and perform atomic updates to the state elements inside the module; (2) Every interface method is guarded, i.e., it cannot be applied unless it is ready; and (3) Modules are composed together by atomic rules which call interface methods of different modules. A rule either successfully updates the state of all the called modules or it does nothing. CMD designs are compiled into RTL which can be run on FPGAs or synthesized using standard ASIC design flows. The atomicity properties of interfaces in CMD ensures composability when selected modules are refined selectively. We show the efficacy of CMD by building a parameterized out-of-order RISC-V processor which boots Linux and runs on FPGAs at 25 MHz to 40 MHz. We also synthesized several variants of it in a 32 nm technology to run at 1 GHz to 1.1 GHz. Performance evaluation shows that our processor beats in-order processors in terms of IPC but will require more architectural work to compete with wider superscalar commercial ARM processors. Modules designed under the CMD framework (e.g., ROB, reservation stations, load store unit) can be used and refined by other implementations. We believe that this realistic framework can revolutionize architectural research and practice as the library of reusable components grows.

Service oriented architecture is widely accepted for designing the projects because it provides reusability, composability, interoperability, distributed deployment. But security is always a concern for this architecture. Security implementation is normally ignored to keep services more reusable and interoperable which causes incidents at the later stage. Service oriented architectural project uses tools like IBM data power for providing security to end users at higher level of service oriented architecture. But the lower levels of SOA remain unsecured. It has also been observed that some unauthorized vendor uses the service illegally which causes heavy load on the exposed service results into slowing down the performance of the specific service.Service-oriented architecture (SOA) is a technique to develop application by assembling different services. It’s an approach to make applications more responsive to meet the requirement of changing business environment. A single application uses many services to meet the consumer requirement where in services are independent entities. The incorporation different security techniques for the services within an application is a difficult task. So, security implementation at service level is generally ignored for service oriented architectural project. The author(s) proposes a model which will enhance the security implementation at service level. Also, similar security implementation can be done for all services within an application. The proposed model will reduce the unauthorize use of service at lower level in SOA. Also, Security and reliability will be enhanced for each service.

From mobile sensor networks to autonomous transportation systems, multi-agent solutions have been proposed to accomplish a variety of tasks. However, these systems typically require satisfaction of multiple constraints, such as safety or connectivity maintenance, while completing their primary objectives. Barrier functions represent one method to enforce such constraints via forward set invariance, and this work extends recent results on Boolean composition of nonsmooth barrier functions by explicitly addressing controlled systems, resulting in nonsmooth control barrier functions. The presented results permit a discontinuous controller, which is particularly amenable to control synthesis, and this paper develops an almost-active gradient for Boolean compositions of nonsmooth control barrier functions, which, when included as a constraint to a quadratic program, yields a valid controller. To verify these theoretical findings, the experimental results encode a series of constraints and synthesize a controller for a leader-follow team of mobile robots in real time.

Microservice architecture (MSA) is an emerging software architectural style, which differs fundamentally from the monolithic, layered architecture. MSA is based on microservices to provide several advantages, such as autonomy, composability, scalability, and fault-tolerance. However, how to manage complex "call" relationships between microservices is still a big issue that needs to be addressed. In this paper, we propose an approach for assisting the development of MSA-based systems, referred to as GMAT (Graph-based Microservice Analysis and Testing). GMAT can automatically generate "Service Dependency Graph (SDG)" to analyze and visualize the dependency relationships between microservices. Using GMAT, people are able to detect anomalies by analyzing risky service invocation chains in early stage of development, and trace the linkages between services when developing a new version of a target system. Experiments show that GMAT is able to work well for both small-scale and large-scale MSA-based systems.

The predictability of non-functional execution qualities is of utmost importance for the successful introduction of multi-core architectures in embedded systems requiring guarantees rather than best effort behavior. Due to the exclusive utilization of claimed resources, invasive computing provides isolation of applications on multi-core systems. This provides composability that allows to characterize and analyze individual applications statically and independent from others. In this paper, we demonstrate the principles of this resource-aware computing paradigm as an enabler for predictability of multiple non-functional properties, i.e., timing and reliability, applied to a cyber-physical system. In particular, we present the application and multi-processor implementation of a reliable and time-predictable acceleration of object detection algorithms for hard real-time control of an inverted pendulum.

Modern sequencing machines produce order of a terabyte of data per day, which need subsequently to go through a complex processing pipeline. The conventional workflow begins with a few independent, shared-memory tools, which communicate by means of intermediate files. Given its lack of robustness and scalability, this approach is ill-suited to exploiting the full potential of sequencing in the context of healthcare, where large-scale, population-wide applications are the norm. In this work we propose the adoption of stream computing to simplify the genomic resequencing pipeline, boosting its perfor­mance and improving its fault-tolerance. We decompose the first steps of the genomic processing in two distinct and specialized modules (preprocessing and alignment) and we loosely compose them via communication through Kafka streams, in order to allow for easy composability and integration in the already-existing YARN-based pipelines. The proposed solution is then experimentally validated on real data and shown to scale almost linearly.

The growing complexity of multi-core architectures has motivated a wide range of software mechanisms to improve the orchestration of parallel executions. Task parallelism has become a very attractive approach thanks to its programmability, portability and potential for optimizations. However, with the expected increase in core counts, finer-grained tasking will be required to exploit the available parallelism, which will increase the overheads introduced by the runtime system. This work presents Task Dependence Manager (TDM), a hardware/software co-designed mechanism to mitigate runtime system overheads. TDM introduces a hardware unit, denoted Dependence Management Unit (DMU), and minimal ISA extensions that allow the runtime system to offload costly dependence tracking operations to the DMU and to still perform task scheduling in software. With lower hardware cost, TDM outperforms hardware-based solutions and enhances the flexibility, adaptability and composability of the system. Results show that TDM improves performance by 12.3% and reduces EDP by 20.4% on average with respect to a software runtime system. Compared to a runtime system fully implemented in hardware, TDM achieves an average speedup of 4.2% with 7.3x less area requirements and significant EDP reductions. In addition, five different software schedulers are evaluated with TDM, illustrating its flexibility and performance gains. This work has been supported by the RoMoL ERC Advanced Grant (GA 321253), by the European HiPEAC Network of Excellence, by the Spanish Ministry of Science and Innovation (contracts TIN2015-65316-P, TIN2016-76635-C2-2-R and TIN2016-81840-REDT), by the Generalitat de Catalunya (contracts 2014-SGR-1051 and 2014-SGR-1272), and by the European Union’s Horizon 2020 research and innovation programme under grant agreement No 671697 and No. 671610. M. Moretó has been partially supported by the Ministry of Economy and Competitiveness under Juan de la Cierva postdoctoral fellowship number JCI-2012-15047.

Differential privacy is a rigorous privacy standard that has been applied to a range of data analysis tasks. To broaden the application scenarios of differential privacy when data records have dependencies, the notion of Bayesian differential privacy has been recently proposed. However, it is unknown whether Bayesian differential privacy preserves three nice properties of differential privacy: sequential composability, parallel composability, and post-processing. In this paper, we provide an affirmative answer to this question; i.e., Bayesian differential privacy still have these properties. The idea behind sequential composability is that if we have $m$ algorithms $Y_1, Y_2, \ldots, Y_m$, where $Y_{\ell}$ is independently $\epsilon_{\ell}$-Bayesian differential private for ${\ell}=1,2,\ldots,m$, then by feeding the result of $Y_1$ into $Y_2$, the result of $Y_2$ into $Y_3$, and so on, we will finally have an $\sum_{\ell=1}^m \epsilon_{\ell}$-Bayesian differential private algorithm. For parallel composability, we consider the situation where a database is partitioned into $m$ disjoint subsets. The $\ell$-th subset is input to a Bayesian differential private algorithm $Y_{\ell}$, for ${\ell}=1,2,\ldots,m$. Then the parallel composition of $Y_1$, $Y_2$, $\ldots$, $Y_m$ will be $\max_{\ell=1}^m \epsilon_{\ell}$-Bayesian differential private. The post-processing property means that a data analyst, without additional knowledge about the private database, cannot compute a function of the output of a Bayesian differential private algorithm and reduce its privacy guarantee., Comment: Published in: 2017 IEEE 28th Annual International Symposium on Personal, Indoor, and Mobile Radio Communications (PIMRC)

Driven by the increasing diversity of current and future HPC hardware and software platforms, the HPC community has seen a dramatic increase in research and development efforts into the composability of discrete software systems. While modularity is often desirable from a software engineering, quality assurance, and maintainability perspective, the barriers between software components often hide optimization opportunities. Recent examples of work in composable HPC software include GPU-Aware MPI, OpenMP's target directive, Lithe, HCMPI, and MVAPICH's unified communication runtime. These projects all deal with breaking down the walls between software or hardware components in order to achieve performance, programmability, and/or portability gains. However, they also generally focus on composing only specific types of HPC software and have limited extensability. In this paper, we present work on using a pluggable API framework on top of a 'generalized work-stealing' runtime to achieve composability of communication, accelerator, and other HPC libraries. We motivate this work by the increasing heterogeneity of HPC hardware, software, and applications, and note that as heterogeneity increases many discrete software frameworks will need to cooperate within a single process. Our framework, called HiPER (a Highly Pluggable, Extensible, and Re-configurable scheduling framework for HPC) enables exactly this cooperation. We demonstrate the programmability improvements enabled by the HiPER framework through the use of novel APIs which reduce programmer burden. We also present performance studies that demonstrate that through unified and asynchronous scheduling of composed software systems we can achieve performance improvements over hand-optimized benchmarks.

Today, the design of modern Transportprotocols follows modular architecture models. This approachtransposes the loose coupling pattern used in software designto protocols allowing them to benefit from the highconfigurability, composability, flexibility and maintainability. Taking into account the "only TCP" policy applied by systemsand Internet providers leading to the non-deployment of newprotocols including modular ones, we propose in this works toapply this design approach to TCP and study the impact of thenew design on its performances. This may allow TCP to benefitof all advantages of modularity while guaranteeing its deployment.

The notion of composition in the context of combinatorial test design naturally arises in situations where the output of one module is used as an input to another module. Composability of tests plans has several important benefits as it facilitates both test and model reuse in such sequential scenarios. In this paper we describe a method for an automatic construction of composable tests plans, one by-product of which is a test plan for the SUT, obtained by their composition. The proposed method is implemented using binary decision diagrams (BDDs), which allows for an efficient and scalable composition-oriented CTD for real-life testing problems. We evaluate the method on a case study of a composition of two Unix Shell operations.

IETF impressively defined internet interoperation across 30 years of unforeseeable syntax API. IOT needs similar future proof, but for connected things' composable semantics, security, reliability and Quality of Service (QoS). This paper overviews these with simplifying tradeoffs from a bottom up approach using Data Distribution Service (DDS). Then high level semantic additions to DDS are suggested for semantics that are backward compatible, while maintaining the security, reliability and QoS of DDS. Finally, further work is suggested toward out-of-the-box composability and interoperability between common IoT data models and compliant solutions.

Complexity in System on a Chip (SoC) design is rapidly escalating with the advent of more advanced nodes and the ability to integrate 100's of cores on a single die. This highlights the need to understand the power consumption of the device in the early architectural phases of SoC design. The Power Analysis tooling, centered on Network on a chip, and developed as part of this project allows for quick iteration of power management topologies and tradeoffs in power management policies. The approach followed allows for successive iteration and composability of the solution as the design progresses and additional details become available. Flexibility is present in the system to assign both degree of uncertainty and replace the imprecise information with new information as the design process is completed.

Timed Automata are established specification models for real-time systems. One of their main advantages is composability, allowing the modular specification of different aspects of a system via communicating timed automata. Composed together, these automata specify the behavior of a whole component or system. In previous work, we developed a technique to determinize a single timed automaton, by unfolding it and bounding ourselves to an observable depth k. Within this paper we expand our approach, enabling the efficient bounded determinization of networks of timed automata. We realize an on-the-fly algorithm that performs at each level of unfolding the following tasks: building the product, hiding the communication, removing silent transitions, and determinizing. In contrast to the previous work, this on-the-fly algorithm only needs to traverse the state-space exactly once. We implemented the algorithm in the model-based testing tool MoMuT::TA and demonstrate and evaluate our implementation on a case study.

Complex systems with high dimensional design spaces are often specified by subsystem compositions that constrain feasible designs towards tight regimes in the design space. Composition between (sub)systems is limited by the interfaces exposed by the interacting architectures. Treating architectures as first class objects with their own formal properties is required to enable designing complex systems by novel compositions of heterogeneous subsystems and their design spaces. We describe a combinatorial model for system architectures using the formalism of cellular sheaves to identify all feasible compositions across heterogeneous subsystems through exposed interfaces. We discuss how the proposed model may be used to automatically generate novel systems of systems compositions and test key properties of composability and compositionality, required for solving planning and reconfiguration problems in systems of systems design.

Software transactional memory (STM) is a synchronisation paradigm which improves the parallelism and composability of modern applications executing on a multi-core architecture. However, to abort and retry a transaction multiple times may have a negative impact on the temporal characteristics of a real-time task set. This paper addresses this issue: It provides a framework in which an upper-bound on the worst-case response time of each task is derived, assuming that tasks are scheduled by following either the Non-Preemptive During Attempt (NPDA), Non-Preemptive Until Commit (NPUC) or Stack Resource Policy for Transactional Memory (SRPTM) policy.