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The combination of CCD and MNOS devices for signal transfer and nonvolatile storage has been discussed by several workers 1–3. In the initial attempt to combine these structures 1 the MNOS storage site was located inside a stepped dielectric, 2φ, CCD shift register. Certain problems were encountered such as inadequate charge handling capability which resulted in poor write characteristics, ineffective write/inhibit operation since high voltage clocks (for good transfer efficiency) caused spurious write operation, poor read operation due to the large access time to first bit and small detection window, and degraded memory retention caused by a small write window and read-disturb effects. To alleviate these problems a compact, nonvolatile, charge-addressed memory (NOVCAM) cell was introduced 2 for block oriented random access memory (BORAM) applications. The NOVCAM cell is composed of a CCD shift register and a thin-oxide MNOS memory structure in parallel with the register to provide separate locations for signal address and storage. Charge is transferred from the CCD shift register to the MNOS structure with a transfer gate φT which results in a collapse of the surface potential beneath the MNOS structure. Once the surface potential is collapsed, the oxide electric field strength increases and the tunneling of signal charge commences from the surface channel into deep traps located near the Si02/Si3N4 interface. The read-out is nondestructive (NDRO) and accomplished through the control action of the MNOS surface potential which gates the parallel charge injection from a P+ source diffusion into the CCD shift register. [ABSTRACT FROM PUBLISHER]