Search

Suitable power levels remain constant challenges in terahertz (THz) communications. This work analytically investigates a 1.94 THz resonant tunneling diode-gated high-electron mobility transistor (RTD-gHEMT)-based oscillator along with a graphene antenna for future 6G wireless networks. We obtain the negative conductance of a distributed circuit model from experimental results of an InGaAs/AlAs RTD oscillator. Analytical results show the device notably achieves an output power up to 14 mW (∼11.5 dBm) whilst operating at frequencies as high as 1.94 THz. Furthermore, the RTD-gHEMT device has a 37.4 nm gate length, which renders a substantial decrease in the system form factor. These unique features place the device as part of potential solutions for generation and transmission of THz signals in 6G networks.

The data rates which can be processed by integrated communication systems are increasing as the CMOS process and photonic technologies scale. Emerging bandwidth-hungry applications demand new solutions based on terahertz (THz) systems. This work proposes a GaAs/AlAs nanocolumn-Resonant Tunneling Diode (Nano-RTD) device as a voltage-controlled oscillator (VCO) for frequency generation in the THz spectrum window, i.e., Y-band (325 - 500 GHz). A comprehensive semianalytical approach to evaluating the performance of the Nano-RTD VCO device is developed. The latter addresses the oscillation frequency, maximum oscillation frequency, tuning range, output power, DC consumption power, and DC/AC conversion efficiency. Moreover, the oscillation stability of the designed device in the Y-band was numerically verified. Results shown that the device can operate in the Y-band (@ ~500 GHz and 300 K), with a very-low DC power consumption down to 0.16 mW, along with a good DC/AC conversion efficiency (2.4%). The Nano-RTD VCO is compatible with current CMOS fabrication technology and has a very compact footprint (2000 nm2). Finally, the device may be used as part of system solutions to satisfying emerging THz wireless applications such as in-body nano-communication, wireless nano-networks, and network-on-chip.

Currently, research focused on the pattern classification in the area of Power Quality has been using Deep Learning techniques. However, some techniques, such as Convolutional Neural Networks, despite its good performance, require images as input data. In this sense, the present paper proposes an analysis of Recurrence Plots textures as a way to identify Power Quality disturbances. Among the disturbances were considered the short and long duration voltage variations, the oscillatory and impulsive transients, the voltage fluctuations and waveform distortions. These analyzes allowed to identify distinct patterns between disturbances and, consequently, demonstrate that Recurrence Plot can be properly employed as a novel feature engineering technique in the scope of Power Quality disturbances classification.

Adaptive processors can dynamically change their hardware configuration by tuning several knobs that optimize a given metric, according to the current application. However, the complexity of choosing the best setup at runtime increases exponentially as more adaptive resources become available. Therefore, we propose a polymorphic VLIW processor coupled to a machine learning-based decision mechanism that quickly and accurately delivers the best trade-off in terms of energy, performance, and reliability. The proposed system predicts the best processor configuration in 97.37% of the test cases and achieves an efficiency that is close to an oracle (more than 93.30% on all benchmarks).

This paper presents a proposal for the development of a web system based on the Internet of Things (IoT) concepts, focused on the environmental monitoring and low cost. The need to carry out such a study is solidified by accelerated technological advancement and widespread concern with the alarming environmental conditions that the world presents today. In this system, groups of sensors are responsible for, through embedded systems, send the data to a server that stores them and also provides graphical interface models on a web page. The implementation of such a procedure allows for a better understanding of relevant environmental characteristics of certain locations, as well as the research for better solutions to environmental issues.

Reliability testing has become extremely important in modern electronics as the soft error rate has been increasing due to technology scaling. The testing must be controllable, generic, done before deployment, cheap, and fast. Even though fault injection is often the most appropriate solution considering these requirements, it is very time-consuming. This work proposes a hybrid fault injection framework that automatically switches between RTL and gate-level simulation modes to speed up fault injection over conventional simulators by more than 10 times, maintaining gate-level fault injection accuracy and controllability. The proposed framework is generic, so that faults can be injected to any arbitrary circuit; and supports concurrent execution of several simulations. As case study, the reliability of a complex 8-issue VLIW processor is assessed.

This paper introduces a new approach for the routing problem in Elastic Optical Networks using an intelligent system based on Fuzzy Logic. It defines a route to a given pair, considering metrics as the spectral fragmentation and the index of the slots to establish the circuit for the USA Topology. The paper outlines the performance of the external fragmentation and network utilization metrics. The simulation results show that the proposed approach has blocking rate 15.23, 1.80, 1.36 lower than Dijkstra, Pseudo Partition and Complete Sharing algorithms. The routing performance can be significantly improved as the Fuzzy system are employed and paves the way for new intelligent techniques to improve the quality of service in Elastic Optical Networks.

In this paper, the performance of optical fast frequency hopping code-division multiple-access (FFH-OCDMA) network based on binary phase shift keying (BPSK) modulation format under both ideal and non-ideal encoding scheme scenarios is addressed for the first time. The results show that the BPSK modulation format increases significantly the signal-to-interference ratio (SIR) and, consequently, the overall network performance. Even though the signal waveforms under non-ideal scenario suffer higher degradation, the BPSK modulation format is still robust to maintain transmissions with error-free even when the network capacity in terms of simultaneous users is under full operation. In addition, it is shown that on-off keying (OOK) - based networks are not good candidates for future FFH-OCDMA implementations in this MAI limited scenario. On the other hand, our results pave the way for BPSK-based networks, which are seen as potential candidates for next generation passive optical networks (NG-PONs).

Because of technology scaling, soft error rate has been increasing in modern processors, affecting system reliability. To mitigate such effect, we propose an adaptive fault tolerance approach that exploits, at run-time, idle functional units to execute duplicated instructions in a configurable VLIW processor. In applications with high Instruction Level Parallelism (ILP) and few functional units available for duplication, it adaptively reschedules instructions according to a configurable threshold, providing a tradeoff between performance and fault tolerance. On average, failure rate is reduced by 89.53%, performance by 5.86%; while energy consumption increases by 72% and area by 22.2%, using a fault tolerance oriented threshold.

Very Long Instruction Word (VLIW) processors are commonplace in embedded systems due to their inherent lowpower consumption as the instruction scheduling is performed by the compiler instead by sophisticated and power-hungry hardware instruction schedulers used in their RISC counterparts. This is achieved by maximizing resource utilization by only targeting a certain application domain. However, when the inherent application ILP (instruction-level parallelism) is low, resources are under-utilized/wasted and the encoding of NOPs results in large code sizes and consequently additional pressure on the memory subsystem to store these NOPs. To address the resource-utilization issue, we proposed a dynamic VLIW processor design that can merge unused resources to form additional cores to execute more threads. Therefore, the formation of cores can result in issue widths of 2, 4, and 8. Without sacrificing the possibility of code interruptability and resumption, we proposed a generic binary scheme that allows a single binary to be executed on these different issue-width cores. However, the code size issue remains as the generic binary scheme even slightly further increases the number NOPS. Therefore, in this paper, we propose to apply a well-known stop-bit code compression technique to the generic binaries that, most importantly, maintains its code compatibility characteristic allowing it to be executed on different cores. In addition, we present the hardware designs to support this technique in our dynamic core. For prototyping purposes, we implemented our design on a Xilinx Virtex-6 FPGA device and executed 14 embedded benchmarks. For comparison, we selected a nondynamic/ static VLIW core that incorporates a similar stop-bit technique for its code compression. We demonstrate, while maintaining code compatibility on top of a flexible dynamic VLIW processor, that the code size can be significantly reduced (up to 80%) resulting in energy savings, and that the performance can be increased (up to a factor of three). Finally, our experimental results show that we can use smaller caches (2 to 4 times as small), which will further help in decreasing energy consumption.

The development of energy efficient hardware has been a trend in microprocessor design for the last two decades. VLIW processors are a representative example, since they have a simpler design and competitive performance, because their ILP exploitation is done statically by the compiler. In this paper, we study the energy savings that could be obtained by adapting such microarchitecture according to the current program phase. Our contribution is twofold. First, by executing a set of benchmarks on the ρ-vex configurable softcore VLIW processor, and by modifying the number of issues, we show the potentials of energy reduction. Then, with this information in hand, we developed an oracle experiment to dynamically vary the issue width of the processor according to the phase behavior, considering two different phase granularites. The potential energy savings using this policy could be as high as 81.5% when compared with the static version, executing the MiBench set.

Because of technology scaling, the soft error rate has been increasing in digital circuits, which in turn affects system reliability. Therefore, modern processors, including VLIW architectures, must have means to mitigate such effects to guarantee reliable computation. In this scenario, our work proposes two new low overhead fault tolerance approaches, with zero latency detection, that correct soft errors in the pipelines of a configurable VLIW processor. Each approach has a distinct way to detect errors, but they both utilize the same rollback mechanism. The first utilizes redundant hardware by having specialized duplicated pipelines. The second uses idle issue slots to execute duplicated instructions and does this by first identifying phases within an application. Our implementation does not require changes to the binary code and has negligible performance losses. It has 50% of area overhead with 35% power dissipation for the full pipeline duplication, and only 7% of extra area when using idle resources. We compared our approach to related work and demonstrate that we are more efficient when one considers the area, performance, power dissipation and error coverage altogether.

Thread-level parallelism (TLP) exploitation for embedded systems has been a challenge for software developers: while it is necessary to take advantage of the availability of multiple cores, it is also mandatory to consume less energy. To speed up the development process and make it as transparent as possible, software designers use parallel programming interfaces (PPIs). However, as will be shown in this paper, each one implements different ways to exchange data, influencing performance, energy consumption and energy-delay product (EDP), which varies across different embedded processors. By evaluating four PPIs and three multicore processors, we demonstrate that it is possible to save up to 62% in energy consumption and achieve up to 88% of EDP improvements by just switching the PPI, and that the efficiency (i.e., The best possible use of the available resources) decreases as the number of threads increases in almost all cases, but at distinct rates.

Thread-Level Parallelism (TLP) exploitation for embedded systems has been a challenge for software developers: while it is necessary to take advantage of the availability of multiple cores, it is also mandatory to consume less energy. To speed up the development process and make it as transparent as possible, software designers use Parallel Programming Interfaces (PPIs). However, as will be shown in this paper, each PPI implements different ways to exchange data using shared memory regions, influencing performance, energy consumption and Energy-Delay Product (EDP), which varies across different embedded processors. By evaluating four PPIs and three multicore processors (ARM A8, A9 and Intel Atom), we demonstrate that by simply switching PPI it is possible to save up to 59% in energy consumption and achieve up to 85% of EDP improvements, in the most significant case. We also show that the efficiency (i.e., The best possible use of the available resources) decreases as the number of threads increases in almost all cases, but at distinct rates.

This paper presents a comparative study between the Mamdani and Sugeno fuzzy inference systems (FIS) for intelligent traffic transmission over optical code-division multiple-access (OCDMA) network architectures. This FIS is capable of mitigating environmental temperature variation effects in the transmission link which are known to play an important role in the overall performance of the network. The paper outlines the basic difference between both Mamdani and Sugeno type FIS for this approach. The results highlight the performance of the two systems and the computational advantages of using Sugeno- type over Mamdani-type.

Embedded systems are becoming increasingly complex and, due to their tight energy requirements, all the available resources must be used in the best possible way. However, Android, the most used software platform for embedded systems, features a virtual machine to run applications. Even though it ensures flexibility so the application can execute on different underlying architectures without the need for recompilation, it burdens the system because of the introduction of an extra software layer. Considering this scenario, through the development of an extension of the Android QEMU emulator and a specific benchmark set, this work evaluates the significance of the virtual machine by comparing applications written in Java and in native language. We show that, given a fixed energy budget, a different amount of applications can be executed depending the way they were implemented. We also demonstrate that this difference varies according to the processor, by executing the applications on all officially supported Android architectures (Intel x86, ARM, and MIPS). Therefore, even though the Virtual Machine provides total transparency to the software developer, he/she must be aware of it and the underlying target micro architecture at early designs stages so as to build a low-energy application.

In this paper, we propose and evaluate the performance of a new scheme for multirate optical code-division multiple-access (OCDMA) networks based on coherent advanced modulation formats, namely binary and quadrature phase shift keying (BPSK and QPSK). The proposed scheme employs BPSK and QPSK modulation formats for low and high rate transmission users, respectively. In addition, we develop a general formalism that allows performance evaluation of legacy networks based on on-off keying (OOK) modulation format. We investigate how the coherent demodulation of encoded fast frequency hopping (FFH) signals under multiple access-interference (MAI) can improve the network performance. It is shown for the first time that simultaneous users of different transmission rates can surprisingly achieve BER levels in the error-free region.

In this paper, we propose a new throughput expression for multirate, multiclass slotted-ALOHA optical fast frequency hopping code-division multiple-access (OFFH-CDMA) packet networks considering a Poisson distribution for packet composite arrivals. We analyze the packet throughput performance of a three-class OFFH-CDMA network, where multirate transmissions are achieved via manipulation of the user's code parameters. It is shown that users transmitting at low rates interfere considerably in the performance of high rate users. Finally, we perform a validation procedure to demonstrate that the proposed multirate throughput expression converges towards the single rate expression (considered as the network limiting case).

Current tools for mobile development are very limited in which and how much information they can trace or profile. They are also scarce when compared to general-purpose development tools. This makes the development of embedded applications, with its hard constraints, such as limited performance and power budget, a hard task to be accomplished. Therefore, a tool that provides information such as energy consumption, execution time and other statistics is mandatory when it comes to develop embedded applications. This paper presents a tool that provides the aforementioned information per application and that is able to trace both Dalvik Virtual Machine and native code. To accomplish this, we extended Android SDK's QEMU, and we developed graphical user interfaces to process the traced data.

In this paper, we propose a new Internet protocol (IP) traffic transmission architecture over optical code-division multiple-access (OCDMA) network capable of providing multiservice, multirate transmissions. The new architecture is independent of the OCDMA scheme employed. The main idea is to use multi-weight multi-length optical orthogonal code (MWML-OOC) as signature sequence of an incoherent OCDMA system to achieve multiservice and multirate transmissions. Furthermore, in order to evaluate the packet error rate (PER) of the proposed multiservice IP transmission, we derive a bit error rate (BER) expression of a MWML-OOC OCDMA system. The network performance is analyzed in terms of the channel utilization of the users' classes. The simulation results show that better performance is obtained by users defined with high-weight code. This is especially evident when the channel utilization is low.

In this paper, we provide a performance comparison and analysis between a hybrid 1-D WDM/OCDMA system and a 2-D WHTS OCDMA system. In the hybrid system, OOC is employed as users code sequence of the OCDMA dimension. The simulation results show that the hybrid system presents better performance than the 2-D WHTS OCDMA system, and show also that under a standard BER scenario, i.e., BER = 10−9, the hybrid system can support at least 75% more simultaneous users than the 2-D OCDMA system for the analyzed case study. The analysis suggests that the hybrid 1-D WDM/OCDMA system is a qualified migration scenario since it can provide a smooth migration path from current networks towards OCDMA networks.

In this paper, we propose a novel optical code division multiplexing/wavelength division multiplexing (OCDM/WDM) optical packet switch architecture capable of supporting multirate and multi-quality of service (QoS) transmission. The main idea is to use multi-weight multi-length optical orthogonal code (MWML-OOC) as signature sequence to provide diversified data rates and services. The architecture of the proposed multiservice OCDM/WDM switch is also presented. Furthermore, in order to analyze the packet loss probability (PLP) of the switch, we derive a bit error rate (BER) expression of the MWML-OOC-based OCDM system. Finally, we show that using high codeword weight and low offered traffic lead to a better PLP.

In this paper we present a comprehensive analysis of the pulse width influence of the initial pulse and the nonlinear optical loop mirror (NOLM) control pulse on a spectral phase-encoded optical code division multiple access (SPECTS-OCDMA) system. The analysis accounts for the detection errors that occur due to multiple access interference (MAI) between the desired and undesired user signals within the NOLM time window. We also investigate by means of two different scenarios how some system parameters perform under the effect of MAI, using the bit error rate (BER) as the figure of merit. In the first scenario, we evaluate how the initial pulse width affects the overall system performance. Results indicate that the system performance does not depend directly on the initial pulse width, but rather on the NOLM's control pulse width to the initial pulse width ratio, when the spectral resolution (number of points per chip in the spectral window) is kept constant. In the second scenario, results show that the increase of the bit rate transmission affects the system performance if the temporal spreading after the encoding process is greater than the bit period. When that is the case, part of the spread energy is within the NOLM's temporal window of the adjacent bit transmitted (inter-symbol interference).

Pervasive healthcare focuses on the use of new technologies, tools, and services, in order to help patients to play a more active role in the treatment of their diseases. Since pervasive healthcare environments demand a huge amount of information exchange, the use of technologies like Health Level Seven (HL7) and archetypes has been proposed to provide interoperability between applications for these environments. However, the complexity of such technologies difficults their full adoption as well as the migration from centralized healthcare environments into pervasive ones. Aiming at collaborating to bridge this gap, this paper proposes an approach to integrate archetypes into HL7 v3 messages for the development of pervasive healthcare applications. The approach suggests the use of Domain Specific Languages (DSLs), which simplify the HL7 messages modeling and allow to automate most of the messages schema codification.