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We review recent results concerning reliability and failure (due to heating) of interconnects based on metallic single-walled carbon nanotubes (SWNTs), graphene, and graphene nanoribbons (GNRs). We examine both intrinsic power dissipation within the interconnect as well as extrinsically to adjacent materials. Fundamental reliability limits are different in the diffusive and quasi-ballistic transport regimes. Thermal engineering in the diffusive regime has recently enabled us to reach current densities up to ~4 GA/cm2 for SWNTs and ~2 GA/cm2 for GNRs. However, short carbon-based interconnects (e.g. L

Power consumption and thermal management are significant challenges in electronics, from mobile devices to data centers. A fundamental examination of such aspects could lead to orders of magnitude improvements in energy efficiency. We present recent highlights from our work examining dissipation in nanoscale devices, at contacts, interfaces, and in novel materials. Advances include the use of high-thermal conductivity materials (graphene), low-power data storage (based on phase change rather than charge), and thermoelectric effects for highly localized cooling. Results suggest much room to improve power dissipation in nanoscale electronics, towards fundamental limits, through the co-design of geometry and materials.

Power consumption and heat dissipation are significant challenges in electronics ranging from mobile devices to large data centers. A fundamental examination of energy dissipation in such contexts can lead to orders of magnitude improvements in energy efficiency. We present recent highlights from our work examining power and heat dissipation in nanoscale device geometries, at contacts or interfaces, and when novel materials are involved. For instance, thermal conductivity is significantly reduced in nanostructures due to the role of boundary scattering. However relatively unusual effects such as quasi-ballistic and thermoelectric transport could be used to partially mitigate the heat generated during device operation. In addition, careful low-power device design from the outset can alleviate heat dissipation problems before they begin. For example, data storage based on phase-change (rather than charge) with carbon nanotube electrodes can lead to two orders of magnitude reduction in power dissipation. The results suggest much room to improve power dissipation in nanoscale electronics, towards near-fundamental limits, through the co-design of geometry and materials.

Phase change memory (PCM) is a promising candidate for next-generation non-volatile data storage, though its high programming current has been a major concern. By utilizing carbon nanotubes (CNTs) and graphene as interconnects to induce phase change in ultra small regions (∼20 nm) of Ge 2 Sb 2 Te 5 (GST), we are able to build ultra-low power PCM devices. Normal memory operations are demonstrated with exceptionally low current (< 5 µA) and power consumption, nearly two orders of magnitude lower than state-of-the-art. Electrical characterization shows that switching voltages in PCM with both CNT and graphene electrodes are scalable to sub-1 V. Our experiments also pave the way to carbon nanoelectronics with integrated PCM data storage.

Phase-change materials (PCM) like Ge 2 Sb 2 Te 5 (GST) have been proposed for non-volatile memory and reconfigurable electronics [1, 2]. One of the drawbacks associated with this technology is the relatively high (∼0.5 mA) programming currents required [3]. In this work, we utilize carbon nanotubes (CNTs) as nano-scaled interconnects to induce reversible switching in very small GST bits (∼10 nm). This lowers the programming currents to

We investigate the effect of pulsed current-voltage (I D -V GS ) measurements on the hysteretic behavior of carbon nanotube field-effect transistors (CNTFET) on SiO 2 , and the subsequent mobility extraction. We find that hysteresis decreases with longer pulse delays and higher ambient temperature, and can be almost entirely eliminated at ~10 s pulse intervals and ~180°C. Moreover, mobility curves extracted in such conditions approach a unified, “true” value for each nanotube, unlike the less reliable conventional methods which rely either on the forward or reverse voltage sweeps.

Micro and Nanotechnology Lab, 208 N Wright St, Urbana IL 61801. Phase-change memory (PCM) is a promising candidate for non-volatile data storage [1]. PCM works by switching a phase-change material (chalcogenide) between its amorphous and crystalline states through Joule heating. The resistivity change is more than 100x, thus stored information can be easily retrieved. An attractive feature of PCM is its potential to scale below 32 nm Flash, yet it is unclear how such memory would be addressed or heated in such highly localized fashion. In this study, we demonstrate a key step in this area, by inducing ultra-narrow (5–10 nm) phase-change regions with individual single-wall carbon nanotube (SWNTs) heaters, and programming currents of the order 10 μA.

We explore several aspects of reliability in carbon nanotube transistors, including their physical dependence on diameter. Avalanche behavior is found at high fields (5–10 V/μm), while Joule breakdown is reached at high current and heating, in the presence of oxygen. Finally, we describe a method for minimizing hysteresis effects via pulsed measurements.

We have experimentally observed and modeled a second-order transport mechanism near breakdown in large-diameter (small-gap) semiconducting SWNTs. We determine impact ionization to be the primary cause of the up-kick in current. Subsequent simulations taking impact ionization into account provide a theoretical match to our experimentally observed current tail.