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The most recent 3D object detectors for point clouds rely on the coarse voxel-based representation rather than the accurate point-based representation due to a higher box recall in the voxel-based Region Proposal Network (RPN). However, the detection accuracy is severely restricted by the information loss of pose details in the voxels. Different from considering the point cloud as voxel or point representation only, we propose a point-to-voxel feature learning approach to voxelize the point cloud with both the point-wise semantic and local spatial features, which maintains the voxel-wise features to build the high-recall voxel-based RPN and also provides the accurate point-wise features for refining the detection results. Another difficulty in object detection for point cloud is that the visible part varies a lot against the full view of object because of the perspective issues in data acquisition. To address this, we propose an attentive corner aggregation module to attentively aggregate the features of local point cloud surrounding a 3D proposal from the perspectives of eight corners in the proposal 3D bounding box. The experimental results on the competitive KITTI 3D object detection benchmark show that the proposed method achieves state-of-the-art performance.

Superconductive niobium-based circuits is a promising energy efficient beyond-CMOS technology that can supplement or replace existing large scale CMOS systems. Modern superconductive circuits utilize more than ten metal layers for gates and interconnect. Many sources of inductive coupling noise exist within this environment. Superconductive circuits are particularly vulnerable to inductive coupling, as the operation of the logic gates and flip flops depends on precise bias conditions, and the signal magnitude is relatively small. These inductive coupling sources are characterized, and the effects of inductive coupling noise in different circuit structures are described. Guidelines to mitigate the deleterious effects of coupling noise are presented.

Road information extraction based purely on remote sensing can be affected by occlusions of the road surface caused by trees, shadows, and buildings. We propose a multimodal fusion method that addresses road extraction and road width estimation by combining aerial imagery, monocular images taken at ground level (street-level), and geospatial data (Open-StreetMap). The method combines semantic segmentation through convolutional neural networks, Voronoi diagram processing, and graph matching.

Modern robotic control tasks are usually solved by applying reinforcement learning techniques. In this paper we show that deep active inference can be applied for creating agents for large and complex environments and show in OpenAI benchmark that deep active inference approach has comparable or better results than modern reinforcement learning algorithms. Active Inference is a framework based on the Free Energy Principle for action and planning in some environment by minimizing Variational Free Energy. The idea is that the agent wants to remain alive and reduce uncertainty, which means that it should avoid surprising or unpreferred states and observations. Active inference proposed as a unifying brain theory but it's implementations unable to handle complex environments. Deep Active Inference algorithm uses deep neural networks to approximate key densities to scale Active Inference to much larger and complex environments.

We show how parameter redundancy in Convolutional Neural Network (CNN) filters can be effectively reduced by pruning in spectral domain. Specifically, the representation extracted via Discrete Co-sine Transform (DCT) is more conducive for pruning than the original space. By relying on a combination of weight tensor reshaping and reordering we achieve high levels of layer compression with just minor accuracy loss. Our approach is applied to compress pre-trained CNNs and we show that minor additional fine-tuning allows our method to recover the original model performance after a significant parameter reduction. We validate our approach on ResNet-50 and MobileNet-V2 architectures for ImageNet classification task.

The introduction of capacitance deep-level transient spectroscopy methods into the practice of monitoring semiconductor devices and integrated circuits is associated with digital processing of capacitance transients that are weak in relation to noise. In this case, identification of devices’ potential defects is reduced to solving inverse ill-posed problems using a correlation procedure and statistical accumulation of experimental data. The accuracy of the solution significantly depends on the availability of a-priori information, which was obtained at the stage of preliminary experiments. The model of the dependence of the transformed capacitance transient on the repetition rate of deep level filling pulse has been proposed and experimental results have been presented. The processing of the results using this model makes it possible to expand the set of a-priori information for identifying potential defects.

We report on a novel architecture of a resonant accelerometer incorporating four proof masses and a compliant parallel motion linkage as a force amplifier. A simple, Manhattan geometry, manufacturable, device is distinguished by low parasitic compliance and purely axial, lacking any bending, loading of the sensing beams. Silicon on insulator (SOI) devices were operated in open loop and in a non-differential mode, the acceleration was emulated by an electrostatic force. Consistently with the model prediction a sensitivity of ≈ 2.3 Hz/V2, which is equivalent to ≈ 417 Hz/g, was experimentally demonstrated in a Si device with ≈ 500 µm × 480 µm × 25 µm masses and 250 µm long and ≈ 1.5 µm wide resonant sensing beams.

Transformers for flash butt welding of pipes with two parallel-connected sections of the primary winding and one secondary winding are considered. The equivalent circuit for such transformers contains parallel-connected branches with resistors, coils and dependent emf sources. The coils have mutual inductive coupling. The paper proposes a method for finding the equivalent circuit parameters based on the results of measuring active powers in parallel-connected windings. The validity of the method is confirmed by the results of a numerical experiment. This method is used to find the parameters of the equivalent circuit of a powerful flash butt welding transformer.

Design of 600 mm dual Ka/Q-band circularly polarized reflectarray for satellite application is presented. For reflectarray implementation a single-layer microstrip element providing independent control of the reradiating wave phase in Ka and Q-bands was developed. A reflectarray prototype consisting of 24465 elements was manufactured and tested. Measurements of the reflectarray prototype were carried out in an anechoic chamber by the near-field scanning method. The minimum measured gain in ±0.75° angle sector were 35.8 dBi in Ka-band and 36 dBi in Q-band. Measured cross-polarization isolations are below 27 dB and 18.7 dB in Ka and Q-band respectively.

We conduct an experimental and numerical study on a self-phase modulation induced spectrum compression dynamics of negatively chirped picosecond pulses in the low-loss dispersion-shifted telecom fiber near its zero dispersion wavelength. By fiber length and peak power optimization, record 49-fold spectrum compression of 38 ps, 2.1 nJ negatively chirped Gaussian pulses with compressed spectrum width of 0.23 nm and ≈50% energy confinement at 1560 nm wavelength was achieved, leading to ≈13-times spectral brightness magnification.

5G new radio low density parity check (5G-NR LDPC) codes specified by the 3rd generation partnership project (3GPP), a representative class of multi-edge-type, quasi-cyclic and raptor-like LDPC codes with rate-compatible and length-scalable capability, could meet with high-throughput demands. The corresponding decoding algorithm and implementation should support low complexity, high performance and scaleinvariance to channel variations and receiver imperfections. Flooding scheduling is usually used for the prevalent decoding algorithms and architecture of LDPC codes, but it is inefficient and inflexible compared with layered scheduling. This paper proposes a new simplification method where the sub-groups with similar fitting functions of normalization factors are incorporated into the same type, and enhanced adaptive normalized min-sum algorithm (enhanced ANMSA) for layered scheduling is further proposed for the implementation of 5G-NR LDPC codes. Based on the new simplification method, the proposed algorithm defines three types of check nodes for base graph 2 (BG2) in 5G-NR LDPC codes, and then obtains three look-up tables for BG2 by training. Simulation results demonstrate that the proposed algorithm can achieve excellent performance for 5G-NR LDPC codes of different rates and lengths over Binary-input AWGN channel and Rayleigh channel.

Many modern telecommunication systems use OFDM signals, because of their high performance in fading channels. Meanwhile, spectrum shortage is one of the most urgent problems. SEFDM signals have OFDM benefits while use less bandwidth at cost of performance degradation or extra computational costs. Computer models help to evaluate SEFDM processing algorithms performance and develop them further. However, experimental verification is essential in order to confirm signals stohastic characteristics in real systems. In this paper we describe experiment for proposed trellis based SEFDM demodulator evaluation. Demodulation algorithm implemented in software provides real-time signal generation and detection process.

This paper presents the FPGA ASIC-like implementation of LDPC decoder for 5G NR BG2 and single lifting factor. The proposed implementation has two main features: architectural and algorithmic. The first is the parallel layered architecture with special offsets and inter-layer network which provides great scalability for variable lifting factors support. The second one is an adaptive normalization approach to increase decoder BER performance. The proposed implementation requires relatively small number resources of Xilinx Kintex Ultrascale FPGA and provides 1 information bit/s/cycle throughput for 10 iterations.

Rapid single flux quantum (RSFQ) circuits have recently attracted considerable attention as a promising beyond CMOS technology for exascale computing. Unlike conventional CMOS circuits, RSFQ circuits require a specific bias current delivered to each Josephson junction, making robust bias networks an issue of great importance for large scale integration. ERSFQ is an energy efficient, inductive bias scheme for RSFQ circuits, where power dissipation is drastically lowered by eliminating the bias resistors while the cell library remains unchanged. An ERSFQ bias scheme requires the introduction of multiple circuit elements — current limiting Josephson junctions, bias inductors, and Josephson transmission lines. Multiple guidelines exist for the effective design of these structures. In this paper, additional parameter guidelines and design techniques are presented to decrease physical area and dynamic power dissipation while improving bias margins. These guidelines and techniques are applicable to automating the synthesis of bias networks to enable large scale ERSFQ circuits.

One of the effective use areas of an active rectifier is AC drives based on autonomous voltage inverters. In them, an active rectifier makes it possible to recuperate the energy of the electric motor into the supply network and increase the electromagnetic compatibility of the converter with the supply network. This can be achieved by using various topologies of active rectifier control systems. Therefore, in this article, an analysis of the basic control systems effectiveness of an active rectifier was carried out in the implementation of the main functions assigned to the converter power circuit. A new structure of a vector control system with a fixed modulation frequency is proposed, which makes it possible to form a sinusoidal mains current with a given phase shift relative to the supply voltage.

This paper discusses improvements to the Verilog- To-Routing (VTR) Computer Aided Design (CAD) tool, that enables synthesis of Verilog circuits to a Field Programmable Gate Array (FPGA) architecture, previously impossible due to device size limitations imposed by device growth. The proposed solution allows reducing device sizes required for well known circuits, through exploring the space/performance trade-off question at a finer granularity at early CAD stages. Results of as much as 2.63 times increase in performance and a 48% reduction in device size have been achieved for some circuits.

With the advent of gated quantum computers and regular structures of the qubit layout, methods for placement, routing, noise estimation and logic to hardware mapping become imminently required. In this paper, we propose a method for quantum circuit layout that is intended to solve such problems when mapping a quantum circuit to a quantum computer. The proposed method starts by building a Circuit Interaction Graph (CIG) that represents the ideal hardware layout minimizing the distance and path length between the individual qubits. The CIG is also used to introduce a qubit noise model. Once constructed, the CIG is iteratively reduced to a given architecture (qubit coupling model) specifying the neighborhood, qubits, priority and qubits noise. The introduced constraints allow to additionally reduce the graph according to preferred weights of desired properties. The proposed method is verified and tested on a set of standard benchmarks.

Runtime environments allow for dynamic memory management, without explicit allocations and deallocations from programmers. Thus, algorithms that are responsible for identifying live objects and freeing the unused memory are triggered throughout the application execution. Garbage collection algorithms can cause delays and affect the overall performance. Google's V8 JavaScript engine is a runtime environment that translates JavaScript to machine code and implements garbage collection. The engine is used, as an autonomous system or module, in projects such as: the Chrome web browser and Node.js with multi-platform support. Thus, there is a wide range of applications including real-time systems and web applications on the cloud, desktop, server and mobile devices and with different micro processor architecture (ARM, MIPS etc.) that use directly or indirectly the engine. This paper surveys the V8 virtual machine infrastructure on the techniques for managing memory dynamically. The focus is on memory and object layout, as well as the garbage collection techniques used. Furthermore, the paper defines the specific constraints that are imposed on V8, outlines historical approaches of solving the problem and describes its current state. Finally, it presents research directions that can be explored in garbage collection using the V8 runtime.

The paper discusses the laboratory prototype for the battery charging system with a resonance power converter that is investigated to develop a wireless charging system for movable devices using this technology as the basis. The text contains a theoretical description of such devices, as well as the experimental results including determination of the resonant frequency, research of the laboratory prototype in the cases when there is coils misalignment, and when the foreign object is located between the coils, and calculation of the overall system efficiency.The research established the wireless power transfer effectiveness depending on the distance between the coils and the misalignment distance. As a result, the threshold distance was found, at which the coupling coefficient of the coils decreases sharply, which leads to an abrupt decrease in the efficiency.In the final part of the paper, the necessity of further research aimed at the system’s mathematical model refinement is justified. Nevertheless, research of the laboratory prototype shows that within the identified limiting factors, the charging system based on wireless power transfer with the resonance power converter is efficient and can be scaled to wireless charge systems for movable devices.

The report studies the effect of linear acceleration up to 100g on the readings of a MEMS gyroscope (as a part of IMU). A method for zero offset finding is described, when it is used in the conditions of skews in the places of IMU installation on the rotational stand. The calibration method that takes into account the occurring zero offsets from the acceleration, measured along three axes is proposed. The main results of the developed method application are presented.

Motivated by the success of convolutional neural networks (CNNs) in image-related applications, in this paper, we design an effective method for no-reference 3D image quality assessment (3D IQA) through CNN-based feature extraction and consolidation strategy. In the first and most vital stage, quality-aware features, which reflect the inherent quality of images, are extracted by a fine-tuned CNN model exploiting the concept of transfer learning. This fine-tuning strategy solves the large-scale training data dependence existing in current deep-learning-based IQA algorithms. In the second stage, features from the left and right view are consolidated by linear weighted fusion where the weight for each image is obtained from its saliency map. In addition, the statistical characteristics of the disparity map are also considered in a multi-scale manner as additional features. In the final stage of quality mapping, the objective score for each stereoscopic pair is gained by support vector regression. The experimental results on the public databases show that our approach outperforms many existing no-reference and even full-reference methods.