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The Mu2e experiment at the Fermilab Muon Campus will search for the coherent neutrinoless conversion of a muon into an electron in the field of an aluminum nucleus with a sensitivity improvement by a factor of 10 000 over existing limits. Such a charged lepton flavor-violating reaction probes new physics at a scale unavailable with direct searches at either present or planned high-energy colliders. The Mu2e Trigger and Data Acquisition (TDAQ) system exploits otsdaq as its online Data Acquisition System (DAQ) solution. Developed at Fermilab, otsdaq integrates both the artdaq DAQ and the art analysis frameworks for event transfer, filtering, and processing. otsdaq is an online DAQ software suite with a focus on flexibility and scalability and provides a multi-user, web-based, interface accessible through a web browser. The read out controllers (ROCs) stream out zero-suppressed data continuously from the detector subsystems to the data transfer controllers (DTCs). The data stream is then read over the peripheral component interconnect express (PCIe) bus to a software filter algorithm that selects events which are combined with the data flux coming from a cosmic-ray veto (CRV) system. The detector control system (DCS) has been developed using the experimental physics and industrial control system (EPICS) open source platform for monitoring, controlling, alarming, and archiving. The DCS has been integrated into otsdaq. A prototype of the TDAQ system and the DCS has been built at Fermilab’s Feynman Computing Center. In this article, we report on the progress of the integration of this prototype in the online otsdaq software. [ABSTRACT FROM AUTHOR]

J-PARC E16 is an experiment to examine the origin of hadron mass through a systematic measurement of spectral changes of vector mesons in nuclei. The measurement of $e^{+}e^{-}$ pairs from the decay of vector mesons will provide the information of the partial restoration of the chiral symmetry in a normal nuclear density. To resolve a pulse pile-up and achieve good discrimination of $e^{+}$ and $e^{-}$ from the background of a reaction rate of an order of 10 MHz, the data acquisition (DAQ) system uses waveform sampling chips of APV25 and DRS4. The trigger rate and data rate are expected to be 1 kHz and 120–330 MiB/s, respectively. The DAQ system for readout of APV25 and DRS4 were developed, where events were synchronized by common trigger and tag data. The first commissioning in beam, called Run-0a, was performed in June 2020 with about 1/4 of the designed setup. The DAQ worked with a trigger rate of 300 Hz in the Run-0a and the main bottleneck was a large data size of APV25. Further optimization of the DAQ system will improve the performance. [ABSTRACT FROM AUTHOR]

The Mu3e experiment aims to find or exclude the lepton flavor violating decay μ+ → e+e−e+$ with a sensitivity of one in 1016 muon decays. The first phase of the experiment is currently under construction at the Paul Scherrer Institute (PSI, Switzerland), where beams with up to 108 muons per second are available. The detector will consist of an ultra-thin pixel tracker made from High-Voltage Monolithic Active Pixel Sensors (HV-MAPS), complemented by scintillating tiles and fibers for precise timing measurements. The experiment produces about 100Gbit/s of zero-suppressed data, which are transported to a filter farm using a network of field programmable gate arrays (FPGAs) and fast optical links. On the filter farm, tracks and three-particle vertices are reconstructed using highly parallel algorithms running on graphics processing units, leading to a reduction of the data to 100 Mbyte/s for mass storage and offline analysis. This article introduces the system design and hardware implementation of the Mu3e data acquisition and filter farm. [ABSTRACT FROM AUTHOR]

An experiment to measure an invariant mass of $\phi $ mesons in nuclear medium is planned as the J-PARC E16 experiment. A trigger merging module (TRG-MRG) has been developed to detect leading-edges from 256 channels of discriminator-output signals and transmit those serialized hit data to trigger decision module with four optical links. The result of the test shows enough performance of the TRG-MRG as 1-ns time-to-digital converter (TDC) and data multiplexer with four 6.25 Gb/s transceivers. [ABSTRACT FROM AUTHOR]

Time measurements play a crucial role in trigger and data acquisition systems of high-energy physics experiments, where synchronization between system elements, signal calibration, and phase-measurement accuracy is often required. In this paper, we present a fully digital time-to-digital converter (TDC) architecture and its application, based on a synthesizable digitally controlled oscillator (DCO), where the TDC is used to measure the phase relationship between a timing signal and a 40-MHz reference clock. The DCO design is technology independent; it is described by means of a hardware description language and it can be placed and routed with automatic tools. The TDC will be used in the new readout chip that is under development for the muon detector electronic upgrade in Large Hadron Collider beauty experiment at CERN. The TDC presented in this paper has the fundamental task of measuring, with a resolution of about 1.5 ns, the phase difference between the 40-MHz LHC machine clock and a digital signal coming from the muon detector. [ABSTRACT FROM PUBLISHER]

We present a custom integrated circuit, named SYNC, which plays a fundamental role in the time alignment of the LHCb Muon Detector and consequently in the trigger performance. The SYNC is realized in IBM 0.25~\mu m technology, using radiation-hardening layout techniques. SYNC receives data from the muon detector front-end electronics synchronizing them with the 40.08 MHz LHC clock. The data are tagged with the correct Bunch-Crossing identifier, output to the trigger system and stored in internal memories. The chip integrates 8 time to digital converters with a resolution up to 1 ns to measure the time phase of the input signals with respect to the system clock period. A histogram block can build real time spectra from the TDCs output. A I^2C interface is implemented to configure and control the device, while a JTAG interface is integrated for boundary-scan purpose. We describe the circuit architecture, its internal blocks and its main modes of operation. Measurements performed on final prototypes are also reported. [ABSTRACT FROM PUBLISHER]